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FS6209

Dual PLL VCXO Clock Generator IC

Unspecified 

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February 1999

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1.0 Features

• Dual phase-locked loop (PLL) device two output

clock frequencies

• On-chip tunable voltage-controlled crystal oscillator

(VCXO) allows precise system frequency tuning

• 3.3V supply voltage

• Small circuit board footprint (8-pin 0.150″ SOIC)

• Custom frequency selections available - contact your

local AMI Sales Representative for more information

Figure 1: Pin Configuration

XIN 1

VDD 2

XTUNE 3

VSS 4

8 XOUT

7 VSS

6 CLKB

5 CLKA

8-pin (0.150″) SOIC

2.0 Description

The FS6209 is a monolithic CMOS clock generator IC

designed to minimize cost and component count in digital

video/audio systems.

At the core of the FS6209 is circuitry that implements a

voltage-controlled crystal oscillator when an external

resonator (nominally 13.5MHz) is attached. The VCXO

allows device frequencies to be precisely adjusted for use

in systems that have frequency matching requirements,

such as digital satellite receivers.

Two high-resolution phase-locked loops generate two

output clocks (CLKA and CLKB) through an array of post-

dividers. All frequencies are ratiometrically derived from

the VCXO frequency. The locking of all the output fre-

quencies together can eliminate unpredictable artifacts in

video systems and reduce electromagnetic interference

(EMI) due to frequency harmonic stacking.

Table 1: Crystal / Output Frequencies

DEVICE

fXIN (MHz)

CLKA (MHz)

FS6209-01

13.5

54

NOTE: Contact AMI for custom PLL frequencies

CLKB (MHz)

22.5792

(+1.12ppm)

Figure 2: Block Diagram

XIN

XOUT

XTUNE

VCXO

CLKA

PLL

DIVIDER

ARRAY

PLL

CLKB

FS6209

This document contains information on a preproduction product. Specifications and information herein are subject to change without notice.

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