GRM188R61E105KA12D 데이터 시트보기 (PDF) - International Rectifier

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GRM188R61E105KA12D

9A Highly Integrated SupIRBuck™ Single‐Input Voltage, Synchronous Buck Regulator

International Rectifier 

9A Highly Integrated SupIRBuckTM

Single‐Input V-o2lt0a-ge, Synchronous Buck Regulator

PD‐97661

IR3899

SOFT‐START

IR3899 has an internal digital soft‐start to control the

output voltage rise and to limit the current surge at the

start‐up. To ensure correct start‐up, the soft‐start

sequence initiates when the Enable and Vcc rise above

their UVLO thresholds and generate the Power On Ready

(POR) signal. The internal soft‐start (Intl_SS) signal linearly

rises with the rate of 0.2mV/µs from 0V to 1.5V. Figure 7

shows the waveforms during soft start (also refer to Fig.

20). The normal Vout start‐up time is fixed, and is equal to:

Tstart



0.65V-0.15V

0.2mV/s



2.5ms(1)

During the soft start the over‐current protection (OCP) and

over‐voltage protection (OVP) is enabled to protect the

device for any short circuit or over voltage condition.

POR

1.5V

0.65V

0.15V

Intl_SS

3.0V

Vout

t1 t2

t3

Figure 7: Theoretical operation waveforms during

soft‐start (non tracking / non sequencing)

OPERATING FREQUENCY

The switching frequency can be programmed between

300kHz – 1500kHz by connecting an external resistor from

Rt pin to Gnd. Table 1 tabulates the oscillator frequency

versus Rt.

SHUTDOWN

IR3899 can be shut down by pulling the Enable pin below

its 1.0V threshold. This will tri‐state both the high side and

the low side driver.

TABLE 1: SWITCHING FREQUENCY (FS) VS. EXTERNAL RESISTOR (RT)

Rt (KΩ)

80.6

60.4

48.7

39.2

34

29.4

26.1

23.2

21

19.1

17.4

16.2

15

Freq (KHz)

300

400

500

600

700

800

900

1000

1100

1200

1300

1400

1500

OVER CURRENT PROTECTION

The over current (OC) protection is performed by sensing

current through the RDS(on) of the Synchronous MOSFET.

This method enhances the converter’s efficiency, reduces

cost by eliminating a current sense resistor and any layout

related noise issues. The current limit is pre‐set internally

and is compensated according to the IC temperature. So at

different ambient temperature, the over‐current trip

threshold remains almost constant.

Note that the over current limit is a function of the Vcc

voltage. Refer to the typical performance curves of the

OCP current limit with the internal LDO and the external

Vcc voltage. Detailed operation of OCP is explained as

follows.

Over Current Protection circuit senses the inductor current

flowing through the Synchronous MOSFET closer to the

valley point. OCP circuit samples this current for 40nsec

typically after the rising edge of the PWM set pulse which

has a width of 12.5% of the switching period. The PWM

pulse starts at the falling edge of the PWM set pulse. This

makes valley current sense more robust as current is

sensed close to the bottom of the inductor downward

slope where transient and switching noise are lower and

helps to prevent false tripping due to noise and transient.

An OC condition is detected if the load current exceeds the

threshold, the converter enters into hiccup mode. PGood

will go low and the internal soft start signal will be pulled

low. The converter goes into hiccup mode with a 20.48ms

(typ.) delay as shown in Figure 8. The convertor stays in

this mode until the over load or short circuit is removed.

The actual DC output current limit point will be greater

than the valley point by an amount equal to approximately

20 JANUARY 18, 2013 |DATA SHEET | 3.6

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