NCP1216A 데이터 시트보기 (PDF) - ON Semiconductor

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NCP1216A

PWM Current-Mode Controller for High-Power Universal Off-Line Supplies

ON Semiconductor 

NCP1216, NCP1216A

Max Peak

300

Current

200

100

0

Skip Cycle

Current Limit

315.4U 882.7U 1.450M 2.017M 2.585M

Figure 23. The Skip Cycle Takes Place at Low Peak

Currents which Guarantees Noise Free Operation

Non−Latching Shutdown

In some cases, it might be desirable to shut off the part

temporarily and authorize its restart once the default has

disappeared. This option can easily be accomplished

through a single NPN bipolar transistor wired between FB

and ground. By pulling FB below the Adj pin 1 level, the

output pulses are disabled as long as FB is pulled below

pin 1. As soon as FB is relaxed, the IC resumes its operation.

Figure 24 depicts the application example:

ON/OFF

1

8

2

7

3

6

Q1

4

5

Figure 24. Another Way of Shutting Down the IC

without a Definitive Latchoff State

A full latching shutdown, including overtemperature

protection, is described in application note AND8069/D.

Power Dissipation

The NCP1216 is directly supplied from the DC rail

through the internal DSS circuitry. The current flowing

through the DSS is therefore the direct image of the

NCP1216 current consumption. The total power dissipation

can be evaluated using:

(VHVDC * 11 V) ICC2

(eq. 10)

which is, as we saw, directly related to the MOSFET Qg. If

we operate the device on a 90−250 VAC rail, the maximum

rectified voltage can go up to 350 VDC. However, as the

characterization curves show, the current consumption

drops at a higher junction temperature, which quickly occurs

due to the DSS operation. In our example, at

Tambient = 50°C, ICC2 is measured to be 2.9 mA with a

10 A / 600 V MOSFET. As a result, the NCP1216 will

dissipate from a 250 VAC network,

350 V 2.9 mA@TA + 50°C + 1 W

(eq. 11)

The PDIP−7 package offers a junction−to−ambient thermal

resistance RqJ−A of 100°C/W. Adding some copper area

around the PCB footprint will help decreasing this number:

12 mm x 12 mm to drop RqJ−A down to 75°C/W with 35 m

copper thickness (1 oz.) or 6.5 mm x 6.5 mm with 70 m

copper thickness (2 oz.). For a SOIC−8, the original

178°C/W will drop to 100°C/W with the same amount of

copper. With this later PDIP−7 number, we can compute the

maximum power dissipation that the package accepts at an

ambient of 50°C:

P

max

+

TJmax * TAmax

RqJ * A

+

1

W

(eq. 12)

which barely matches our previous budget. Several

solutions exist to help improving the situation:

1. Insert a Resistor in Series with Pin 8: This resistor will

take a part of the heat normally dissipated by the NCP1216.

Calculations of this resistor imply that Vpin8 does not drop

below 30 V in the lowest mains conditions. Therefore, Rdrop

can be selected with:

Rdrop

v

Vbulkmin *

8 mA

50

V

(eq. 13)

In our case, Vbulk minimum is 120 VDC, which leads to a

dropping resistor of 8.7 kW. With the above example in

mind, the DSS will exhibit a duty−cycle of:

2.9 mAń8 mA + 36%

(eq. 14)

By inserting the 8.7 kW resistor, we drop

8.7 kW * 8 mA + 69.6 V

(eq. 15)

during the DSS activation. The power dissipated by the

NCP1216 is therefore:

Pinstant * DSSduty * cycle +

(350 * 69) * 8 m * 0.36 + 800 mW

(eq. 16)

We can pass the limit and the resistor will dissipate

1 W * 800 mW + 200 mW

(eq. 17)

or

pdrop

+

692

8.7 k

*

0.36

(eq. 18)

2. Select a MOSFET with a Lower Qg: Certain MOSFETs

exhibit different total gate charges depending on the

technology they use. Careful selection of this component

can help to significantly decrease the dissipated heat.

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