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NCP1216A 데이터 시트보기 (PDF) - ON Semiconductor

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NCP1216A Datasheet PDF : 18 Pages
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NCP1216, NCP1216A
the nominal switching frequency whose sweep is
synchronized with the VCC ripple. For instance, with a 2.2 V
peaktopeak ripple, the NCP1216P065 frequency will
equal 65 kHz in the middle of the ripple and will increase as
VCC rises or decrease as VCC ramps down. Figure 20
portrays the behavior we have adopted:
To better understand how this skip cycle mode takes place,
a look at the operation mode versus the FB level
immediately gives the necessary insight:
FB
VCCOFF
VCC Ripple
68 kHz
4.2 V, FB Pin Open
65 kHz
62 kHz
VCCON
Figure 20. VCC Ripple is Used to Introduce a
Frequency Jittering on the Internal Oscillator
Sawtooth
Skipping Cycle Mode
The NCP1216 automatically skips switching cycles when
the output power demand drops below a given level. This is
accomplished by monitoring the FB pin. In normal
operation, pin 2 imposes a peak current accordingly to the
load value. If the load demand decreases, the internal loop
asks for less peak current. When this setpoint reaches a
determined level, the IC prevents the current from
decreasing further down and starts to blank the output
pulses: the IC enters the socalled skip cycle mode, also
named controlled burst operation. The power transfer now
depends upon the width of the pulse bunches (Figure 22).
Suppose we have the following component values:
Lp, primary inductance = 350 mH
Fsw, switching frequency = 65 kHz
Ip skip = 600 mA (or 333 mV / Rsense)
The theoretical power transfer is therefore:
1
2
Lp
Ip2
Fsw + 4 W.
(eq. 8)
If this IC enters skip cycle mode with a bunch length of
10 ms over a recurrent period of 100 ms, then the total power
transfer is:
4 0.1 + 400 mW.
(eq. 9)
Normal Current Mode Operation
Skip Cycle Operation
IpMIN = 333 mV / Rsense
3.2 V, Upper
Dynamic Range
1V
Figure 21.
When FB is above the skip cycle threshold (1.0 V by
default), the peak current cannot exceed 1.0 V/Rsense. When
the IC enters the skip cycle mode, the peak current cannot go
below Vpin1 / 3.3. The user still has the flexibility to alter this
1.0 V by either shunting pin 1 to ground through a resistor
or raising it through a resistor up to the desired level.
Grounding pin 1 permanently invalidates the skip cycle
operation.
Power P1
Power
P2
Power
P3
Figure 22. Output Pulses at Various Power Levels
(X = 5 ms/div) P1 < P2 < P3
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