SL74HC393 데이터 시트보기 (PDF) - System Logic Semiconductor
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SL74HC393
System Logic Semiconductor
SL74HC393 Datasheet PDF : 7 Pages
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SL74HC393
Dual 4-Stage Binary Ripple Counter
High-Performance Silicon-Gate CMOS
The SL74HC393 is identical in pinout to the LS/ALS393. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
This device consists of two independent 4-bit binary ripple
counters with parallel outputs from each counter stage. A÷256 counter
can be obtained by cascading the two binary counters.
Internal flip-flops are triggered by high-to-low transitions of the
clock input. Reset for the counters is asynchronous and active-high.
State changes of the Q outputs do not occur simultaneously becaue of
internal ripple delays. Therefore, decoded output signals are subject to
decoding spikes and should not be used as clocks or as strobes except
when gated with the Clock of the SL74HC393.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
SL74HC393N Plastic
SL74HC393D SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 14 =VCC
PIN 7 = GND
FUNCTION TABLE
Inputs
Clock Reset
X
H
H
L
L
L
L
L
X = don’t care
Outputs
L
No Change
No Change
No Change
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State
SLS
System Logic
Semiconductor
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