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Z80382

HIGH-PERFORMANCE DATA COMMUNICATIONS PROCESSORS

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Z80382/Z8L382

High-Performance Data Communications Processors

Table 3. DC Electrical Characteristics

Symbol

VIH

Item

Input High Voltage

Condition

Min.

Typ.

Max.

Unit

See Table 2

V

1

VIL

Input Low Voltage

See Table 2

V

VOH

Output High Voltage

See Table 1

V

VOL

Output Low Voltage

IIL

Input Leakage

Current, All Inputs

Except CLKI, CLKO

VIN = 0.5V to

VDD - 0.5V

See Table 1

V

1.0

mA

ITL

Tri-State Leakage

Current

VIN = 0.5 to

VDD - 0.5

1.0

mA

IDD

VDD Supply Current (1, 3)

BUSCLK = 10 MHz

Normal Operation

VDD = 3.3V

75

mA

BUSCLK = 10 MHz

90

mA

VDD = 5V

BUSCLK = 20 MHz

150

mA

VDD = 5V

IDDS

VDD Supply Current

BUSCLK = 10 MHz

Standby Mode (1, 2, 3)

VDD = 3.3V

BUSCLK = 10 MHz

50

mA

50

mA

VDD = 5V

BUSCLK = 20 MHz

50

mA

VDD = 5V

Notes:

1. VIH min = VDD-1.0V, VIL max = 0.8V. All output terminals are at no load.

2. On-chip peripherals with independent clocks are inactive (not being clocked).

3. BUSCLK is the internal processor clock frequency.

DS97Z382000

PRELIMINARY

9

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