HSP48212 데이터 시트보기 (PDF) - Intersil

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HSP48212

Digital Video Mixer

Intersil 

Functional Block Diagram

DINB0-11

Z-1

M0-11

Z-1

DINA0-11

Z-1

CLK

HSP48212

PROGRAMMABLE

DELAY

(Z - N)

PROGRAMMABLE

DELAY

(Z - N)

PROGRAMMABLE

DELAY

(Z - N)

BYPASS

DEL

LD

PROGRAMMABLE

DELAY CONTROL

REGISTER

FORMAT

Z-1

M

Z-1

Z -1

(1 - M)

ADDER

Z-1

FORMAT

Z-1

Z -1

TC

RND0-1

SHIFT LEFT

PROGRAMMABLE

Z-1

Z-1

DELAY

Z-4

(Z - N)

OUTPUT

PROGRAMMABLE

FORMAT

Z-1

DELAY

(Z - N)

Z-4

Z-1

OE

FIGURE 1. FUNCTIONAL BLOCK DIAGRAM

DOUT0-12

4

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