WM2633 데이터 시트보기 (PDF) - Wolfson Microelectronics plc
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WM2633
Wolfson Microelectronics plc
WM2633 Datasheet PDF : 12 Pages
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WM2633
Production Data
SOFTWARE CONFIGURATION OPTIONS
DATA FORMAT
The WM2613 writes data either to one of the DAC holding latches or to the control register
depending on the address bits A1 and A0.
A1
A0
LATCH
0
0
DAC LSW holding
0
1
DAC MSW holding
1
0
Reserved
1
1
Control
Table 2 Register Map
D7
DAC 7
X
0
X
D6
DAC 6
X
0
X
D5
DAC 5
X
0
X
D4
DAC 4
X
0
REF1
D3
D2
DAC 3 DAC2
DAC 11 DAC 10
0
0
REF0 RLDAC
D1
DAC 1
DAC 9
0
PWR
D0
DAC 0
DAC 8
0
SPD
PROGRAMMABLE SETTLING TIME
Settling time is a software selectable 3.5µs or 1µs, typical to within ±0.5LSB of final value. This is
controlled by the value of SPD – Bit D12. A ONE defines a settling time of 1µs, a ZERO defines a
settling time of 3.5µs.
PIN
BIT
MODE
SPD
SPD
0
0
Slow
0
1
Fast
1
0
Fast
1
1
Fast
Table 3 Programmable Settling Time
PROGRAMMABLE POWER DOWN
The power down function can be controlled by PWR. A ZERO configures the device as active, or fully
powered up, a ONE configures the device into power down mode. When the power down function is
released the device reverts to the DAC code set prior to power down.
PIN
BIT
POWER
NPD
PWD
0
0
Down
0
1
Down
1
0
Normal
1
1
Down
Table 4 Programmable Power Down
LOAD DAC LATCH
Bit RLDAC controls the function of the DAC latch. A ONE configures the DAC latch as transparent. A
ZERO configures the DAC latch to be controlled by pin NLDAC.
PIN
BIT
NLDAC
RLDAC
0
0
0
1
1
0
1
1
Table 5 Load DAC Latch
LATCH
Transparent
Transparent
Hold
Transparent
WOLFSON MICROELECTRONICS LTD
PD Rev 1.0 July 1999
10
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