W83195BG-341 데이터 시트보기 (PDF) - Winbond

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W83195BG-341

WINBOND CLOCK GENERATOR FOR VIA P4/KT SERIES CHIPSET

Winbond 

W83195BR-341/W83195BG-341

CLOCK GEN. FOR VIA P4/KT SERIES CHIPSET

7.13 Register 13: Control (Default: 24h)

BIT

NAME

PWD

FUNCTION DESCRIPTION

7

INV_AGP

0 Invert the AGP phase 0: Default, 1: Inverse

6

INV_PCI

0 Invert the PCI phase 0: Default, 1: Inverse

5 CSKEW [2]

1 CPU to CPUCS skew control, Skew resolution is 340ps

4 CSKEW [1]

0 Expand the skew direction is same as

3 CSKEW [0]

0 CPU_CPUCS_SKEW [2:0] setting

2 PSKEW [2]

1 CPU to PCI skew control, Skew resolution is 340ps

1 PSKEW [1]

0 PSKEW [0]

0 Expand the skew direction is same as

0 CPU_PCI_SKEW [2:0] setting

7.14 Register 14: Control (Default: 56h)

BIT

NAME

PWD

FUNCTION DESCRIPTION

7 CPUCS_S2

0 CPUCS_T/C slew rate control

6 CPUCS_S1

1 11 : Strong , 00 : Weak , 10/01 : Normal

5 USB48_S2

0 USB48/DOT48/USB24_48 slew rate control

4 USB48_S1

1 11 : Strong , 00 : Weak , 10/01 : Normal

3

AGP_S2

0 AGP2,1,0 slew rate control

2

AGP_S1

1 11 : Strong , 00 : Weak , 10/01 : Normal

1

SELP4_K7

X Device active mode selection

1: P4 mode

0: K7 mode

Default value follow hardware trapping data on pin7 SELP4_K7/AGP1

(Default 1)

0 SELSD_DD

X DRAM module selection

1: SDRAM mode

0: DDR mode

Default value follow hardware trapping data on pin11

SELSD_DD/PCI1 (Default 0)

7.15 Register 15: Slew Rate Control (Default: 55h)

BIT

NAME

PWD

FUNCTION DESCRIPTION

7

PCI_F_S2

0 PCI_F slew rate control

6

PCI_F_S1

1 11: Strong, 00: Weak, 10/01: Normal

5 PCI_64_S2

0 PCI6, 5,4 slew rate control

4 PCI_64_S1

1 11 : Strong , 00 : Weak , 10/01 : Normal

3 PCI_31_S2

0 PCI3, 2,1 slew rate control

2 PCI_31_S1

1 11 : Strong , 00 : Weak , 10/01 : Normal

1

REF_S2

0 REF0, REF1 slew rate control

0

REF_S1

1 11 : Strong , 00 : Weak , 10/01 : Norma

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Publication Release Date: March, 2006

Revision 1.1

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