W83195BG-341 데이터 시트보기 (PDF) - Winbond
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W83195BG-341 Datasheet PDF : 26 Pages
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W83195BR-341/W83195BG-341
Table-2
CLOCK GEN. FOR VIA P4/KT SERIES CHIPSET
REGISTER 1 /BIT 6
REGISTER 9/BIT6
PIN 26
PIN8
PIN18
L_MODE
SEL_CLKSTOP
0
0(default)
PD#
AGP2
PCI6
0
1
PD#
PCI_STOP# CLK_STOP#
1
0
RESET#
AGP2
PCI6
1
1
RESET#
AGP2
PCI6
Table-3 CPU, AGP, PCI divider ratio selection Table
DS2~DS0
CPU
AGP
PCI
000
2
5
10
001
2
6
12
010
3
6
12
011
4
6
12
100
6
6
12
101
3
7
14
110
4
8
16
111
4
10
20
7.10 Register 10: Control (Default: 0Ah)
BIT
NAME
PWD
FUNCTION DESCRIPTION
7 EN_MN_PROG 0 0: Output frequency depend on frequency table
1: Program all clock frequency by changing M/N value
The equation is VCO =14.318MHz*(N+4)/ M.
6
N<10>
0 Programmable N divisor value bit 10
5
Reserve
0 Reserved
4
Reserve
0
3
IVAL<3>
1 Charge pump current selection
2
IVAL<2>
0
1
IVAL<1>
1
0
IVAL<0>
0
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Publication Release Date: March, 2006
Revision 1.1
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