W83194BR-SD 데이터 시트보기 (PDF) - Winbond

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W83194BR-SD

Winbond Clock Generator For INTEL P4 Springdale Series Chipset

Winbond 

W83194BR-SD/W83194BG-SD

CLOCK GEN. FOR INTEL P4 SPRINGDALE/PRESCOTT SERIES CHIPSET

5. PIN DESCRIPTION

BUFFER TYPE SYMBOL

IN

INtd120k

INtp120k

OUT

OD

I/O

I/OD

#

*

&

DESCRIPTION

Input

Latch input pin and internal 120KΩ pull down

Latch input pin and internal 120KΩ pull up

Output

Open Drain

Bi-directional Pin

Bi-directional Pin, Open Drain

Active Low

Internal 120kΩ pull-up

Internal 120kΩ pull-down

5.1 Crystal I/O

PIN

PIN NAME

5

XIN

6

XOUT

TYPE

IN

OUT

DESCRIPTION

Crystal input with internal loading capacitors (18pF) and

feedback resistors.

Crystal output at 14.318 MHz nominally with internal

loading capacitors (18pF).

5.2 CPU, SRC, 3V66, PCI Clock Outputs

PIN

40, 43, 39,

42

37, 36

26

31, 30, 27

8

PIN NAME

CPUCLKT [0:1]

CPUCLKC [0:1]

TYPE

OUT

SRCCLKT,

SRCCLKC

OUT

3V66_3/VCH OUT

VCH_EN&

INtd120k

3V66_0,

3V66_1, 3V66_2

OUT

PCICLK_F0 OUT

FS2&

INtd120k

DESCRIPTION

0.7V Current mode differential clock outputs for CPU and

Chipset.

0.7V Current mode differential clock outputs for Chipset,

100 MHz(default) or 200 MHz outputs selected by I2C

register.

66 MHz(default) or 48 MHz outputs selected by hardware

trapping data on 26 pin VCH_EN& selecting.

3.3V output clocks for the chipset and AGP slot.

PCI clock output.

Latched input for FS2 at initial power up for H/W selecting

the output frequency clocks. This is internal 120KΩ pull

down.

Publication Release Date: March, 22, 2006

-3-

Revision 1.2

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