W144 데이터 시트보기 (PDF) - SpectraLinear Inc

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W144

440BX AGPset Spread Spectrum Frequency Synthesizer

SpectraLinear Inc 

W144

Data Byte 6 (continued)

2

–

–

1

–

–

0

–

–

(Reserved)

(Reserved)

(Reserved)

–

–

0

–

–

0

–

–

0

Data Byte 7

7

–

–

(Reserved)

–

6

–

–

(Reserved)

–

5

–

–

(Reserved)

–

4

–

–

(Reserved)

–

3

–

–

(Reserved)

–

2

–

–

(Reserved)

–

1

–

–

(Reserved)

–

0

–

–

(Reserved)

–

Table 6. Additional Frequency Selections through Serial Data Interface Data Bytes[2]

–

0

–

0

–

0

–

0

–

0

–

0

–

0

–

0

Bit 2

SEL_3

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

Input Conditions

Data Byte 0, Bit 3 = 1

Bit 6

SEL_2

Bit 5

SEL_1

1

1

1

1

1

0

1

0

0

1

0

1

0

0

0

0

1

1

1

1

1

0

1

0

0

1

0

1

0

0

0

0

Bit 4

SEL_0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

Output Frequency

CPU, SDRAM Clocks

(MHz)

133.6

124

150

140

105

110

115

120

100.2

133

112

103

66.8

83.3

75

124

PCI Clocks

(MHz)

33.4 (CPU/4)

31 (CPU/4)

37.5 (CPU/4)

35 (CPU/4)

35 (CPU/3)

36.7 (CPU/3)

39.3 (CPU/3)

40 (CPU/3)

33.4 (CPU/3)

44.3 (CPU/3)

37.3 (CPU/3)

34.3 (CPU/3)

33.4 (CPU/2)

41.7 (CPU/2)

37.5 (CPU/2)

41.3 (CPU/3)

Table 7. Select Function for Data Byte 0, Bits 0:1

Input Conditions

Function

Data Byte 0

Bit 1

Bit 0

CPU_F,

CPU1

Normal Operation

0

0

Note 1

Spread Spectrum

1

0

±0.5%

Three-state

1

1

Hi-Z

Note:

2. CPU and PCI frequency selections are listed in Table 1 and Table 6.

Output Conditions

PCI_F,

PCI1:5

Note 1

±0.5%

Hi-Z

REF0:1,

IOAPIC

14.318 MHz

14.318 MHz

Hi-Z

48MHZ

48 MHz

48 MHz

Hi-Z

24MHZ

24 MHz

24 MHz

Hi-Z

Rev 1.0, November 21, 2006

Page 8 of 13

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