W150 데이터 시트보기 (PDF) - Cypress Semiconductor
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W150 Datasheet PDF : 15 Pages
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PRELIMINARY
W150
Table 6. Frequency Selections through Serial Data Interface Data Bytes
Input Conditions
Output Frequency
Data Byte 0, Bit 3 = 1
Bit 2
SEL_3
Bit 6
SEL_2
Bit 5
SEL_1
Bit 4
SEL_0
CPU, SDRAM
Clocks (MHz)
PCI Clocks
(MHz)
1
1
1
1
133.3
33.3 (CPU/4)
1
1
1
0
124
31 (CPU/4)
Spread On
Spread Percentage
± 0.5% Center
± 0.5% Center
1
1
0
1
1
0
1
0
1
1
0
1
1
0
0
1
0
0
0
1
1
0
1
1
0
1
0
1
150
37.5 (CPU/4)
± 0.5% Center
0
140
35 (CPU/4)
± 0.5% Center
1
105
35 (CPU/3)
± 0.5% Center
0
110
36.7 (CPU/3)
± 0.9% Center
1
115
38.3 (CPU/3)
± 0.5% Center
0
120
40 (CPU/3)
± 0.5% Center
1
100
33.3 (CPU/3)
± 0.5% Center
0
133.3
44.43 (CPU/3)
± 0.5% Center
1
112
37.3 (CPU/3)
± 0.5% Center
0
1
0
0
0
0
1
1
0
0
1
0
0
0
0
1
0
0
0
0
Table 7. Select Function for Data Byte 0, Bits 0:1
103
34.3 (CPU/3)
± 0.5% Center
66.8
33.4 (CPU/2)
± 0.5% Center
83.3
41.7 (CPU/2)
± 0.9% Center
75
37.5 (CPU/2)
± 0.5% Center
124
41.3 (CPU/3)
± 0.5% Center
Function
Normal Operation
Test Mode
Spread Spectrum
Tristate
Input Conditions
Data Byte 0
Bit 1
Bit 0
0
0
0
1
1
0
1
1
Output Conditions
CPU_F, 1:2
Note 2
X1/2
Note 2
Hi-Z
PCI_F, PCI0:5
Note 2
CPU/(2 or 3)
Note 2
Hi-Z
REF0:1,
IOAPIC0,_F
14.318 MHz
X1
14.318 MHz
Hi-Z
48 MHZ
48 MHz
X1/2
48 MHz
Hi-Z
24 MHZ
24 MHz
X1/4
24 MHz
Hi-Z
Note:
2. CPU and PCI frequency selections are listed in Table 2 and Table 6.
Document #: 38-07177 Rev. *B
Page 8 of 15
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