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XRD6415 데이터 시트보기 (PDF) - Exar Corporation

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XRD6415 Datasheet PDF : 20 Pages
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XRD6415
ELECTRICAL CHARACTERISTICS TABLE (CONT’D)
Symbol
Parameter
Min.
Typ.
Max.
Unit Conditions
Digital Outputs
VOH
VOL
IOZ
tDL
tDEN
tDHZ
Output High Voltage
Output Low Voltage
High-Z Leakage
Data Valid Delay2
Data Enable Delay
Data High-Z Delay
Pipeline Delay (Latency)
Power Supplies
IDD(PD)
VDD
DVDD
IDD
Power Down (IDD)
Operating Voltage7,8
Logic Power Supply9
Supply Current
4.5
–10
10
12
10
12
7
8
3
0.3
4.5
5.0
2.7
24
COUT=15pF
V
While Sourcing 4mA
0.4
V
While Sinking 4mA
10
mA OE = High, or PD = High
13
ns
14
ns
9
ns
cycles Time Delay between CLK and
Data Output
0.5
mA
5.5
V
5.5
V
32
mA
Notes
1 Tester measures code transitions by dithering the voltage of the analog input (VIN). The difference between the measured and the
ideal code width (VREF/1024) is the DNL error. The INL error is the maximum distance (in LSBs) from the best fit line to
any transition voltage. Accuracy is a function of the sampling rate (FS).
2 Specified values guarantee functionality. Refer to other parameters for accuracy.
3 Guaranteed. Not tested.
4 –1 dB bandwidth is a measure of performance of the A/D input stage (S/H + amplifier). Refer to other parameters for accuracy
within the specified bandwidth.
5 See VIN equivalent circuit. Switched capacitor analog input requires driver with low output resistance.
6 All inputs have diodes to VDD and GND. Input DC currents will not exceed specified limits for any input voltage between GND and
VDD .
7 The GND pins are connected through the silicon substrate. Connect all GND pins together at the package and to the analog
ground plane. DGND and GND are connected through junction diodes. See logic output interface section.
8 The VDD pins should be tied together at the package.
9 See logic output interface section.
Specifications are subject to change without notice
ABSOLUTE MAXIMUM RATINGS (TA = +25°C unless otherwise noted)1, 2, 3
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V
VRT & VRB . . . . . . . . . . . . . . . . VDD +0.5 to GND –0.5V
VIN . . . . . . . . . . . . . . . . . . . . . . VDD +0.5 to GND –0.5V
All Inputs . . . . . . . . . . . . . . . . . VDD +0.5 to GND –0.5V
All Outputs . . . . . . . . . . . . . . . VDD +0.5 to GND –0.5V
Storage Temperature . . . . . . . . . . . . . . –65 to +150°C
Package Power Dissipation Rating to 75°C
PDIP, SOIC, TQFP, SSOP . . . . . . . . . . . . . 1000mW
Derates above 75°C . . . . . . . . . . . . . . . . . . . 14mW/°C
Lead Temperature (Soldering 10 seconds) . . +300°C
Notes
1 Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
2 Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps
(HP5082-2835) from input pin to the supplies. All inputs have protection diodes which will protect the device from short
transients outside the supplies of less than 100mA for less than 100µs.
3 VDD refers to AVDD and DVDD. GND refers to AGND and DGND.
Rev. 1.00
8

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