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TDA9951 Datasheet PDF : 41 Pages
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NXP Semiconductors
TDA9951
CEC/I2C-bus translator
The seven-bit I2C-bus slave address is hard-coded as 34h and can be changed to 35h by
setting the pin A0, as shown in Table 3 and Table 4. This enables two TDA9951 to be
connected to the same host using the addresses 34h and 35h. Alternatively, changing the
address enables one TDA9951 to avoid address clashes with other I2C-bus slaves.
Table 4. I2C-bus slave address
Bit
7
6
5
4
3
2
1
0
Value
0
1
1
0
1
0
A0
R/W
8.2 Configuring the TDA9951
The TDA9951 is controlled using a series of registers.
Table 5.
Register
APR
CSR
CER
CVR
CCR
ACKH
ACKL
CCONR
CDR
I2C Register configuration
Description
Address
Address Pointer Register
00h
Common Status Register
00h
Common Error Register
01h
Common Version Register
02h
Common Control Register
03h
CEC Address ACK High register 04h
CEC Address ACK Low register 05h
Common Configuration Register 06h
Common Data Registers
07h to 19h
Read/Write
W
R
R
R
R/W
R/W
R/W
R/W
R/W
Reference
Table 6
Table 7
Table 8
Table 9
Table 10
Table 11
Table 12
Table 14
Table 15
The first byte of any I2C-bus write frame configures the address pointer register APR. This
determines the TDA9951 register accessed by the next I2C-bus read or write.
If for example, a read is carried out without first writing to the address pointer register, the
register returned is the register that address pointer register was last set to. The address
pointer auto-increments after each successful read or write for all address pointer values
other than 00h. When the address pointer register is set 00h, the common status register
is polled using successive reads without needing to reset the address pointer register
each time.
When the address pointer register is set higher than 07h, this is treated as setting it to
07h. This is because all message data transfers must start from register 07h and continue
by auto-incrementing in one contiguous transfer.
When the host writes to two or more non-contiguous registers, two separate write
sequences are used with either a STOP/START sequence or repeated START between
them.
Before a read takes place, the host must first write to the address pointer register (if
required) and then, repeat the START condition or STOP/START sequence. Finally, it
starts reading data bytes until the read sequence is complete.
TDA9951_1
Product data sheet
Rev. 01 — 7 August 2008
© NXP B.V. 2008. All rights reserved.
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