STV8162 데이터 시트보기 (PDF) - STMicroelectronics

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STV8162

+5 V, +5 V and +8 V Triple-Voltage Regulator with Disable and Reset Functions

STMicroelectronics 

STV8162 - STV8162D

3 Circuit Description

Circuit Description

The STV8162 and STV8162D are triple-voltage regulators with Reset and Disable functions.

The three regulation parts are supplied from a single voltage reference circuit trimmed by zener

zapping during EWS testing. Since the supply voltage of this voltage reference is connected to pin

INPUT1 (VIN1), the second and third regulators will not work if pin INPUT1 is not supplied.

The output stages are designed using a Darlington configuration with a typical dropout voltage of

1.0 V.

IMPORTANT: In all applications, all three inputs must be polarized. If Outputs 2 or 3 are not used, the

corresponding inputs must be connected to Input 1.

The Disable circuit will switch off pins OUTPUT2 and OUTPUT3 if a voltage less than 0.8 V is

applied to pin DISABLE.

The Reset circuit checks the voltage at pin OUTPUT1. If this voltage drops below VOUT1-0.25 V

(4.75 V Typ.), the "a" comparator (Figure 3) rapidly discharges the external capacitor (Ce) and the

reset output immediately switches to low. When the voltage at pin OUTPUT1 exceeds

VOUT1-0.175 V (4.825 V Typ.), the VCe voltage increases linearly to the reference voltage (VREF =

2.5 V) corresponding to a Reset Pulse Delay (tRD) as shown in Figure 4.

tRD

=

-C----e----´-----2---.--5----V--

10 m A

Afterwards, the reset output returns to high. To avoid glitches in the reset output, the second

comparator "b" has a large hysteresis (1.9 V).

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