HSP50307EVAL1(1996) 데이터 시트보기 (PDF) - Intersil

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HSP50307EVAL1
(Rev.:1996)

Burst QPSK Modulator

Intersil 

HSP50307

Absolute Maximum Ratings

5V Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.0V

9V Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.0V

ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1, HBM

Operating Conditions

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC

Thermal Information

Thermal Resistance (Typical, Note 1)

θJA (oC/W)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

70

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC

(SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Specifications RCLK = 2.048MHz; MCLK = 25.6MHz; TA = 0oC to 70oC

PARAMETER

SYMBOL/PIN

MIN

TYP

MAX

UNIT

5V Supply Voltage

AVCC, DVCC

4.75

5.0

5.25

V

9V Supply Voltage

AVDD

8.55

9.0

9.45

V

5V Supply Current

9V Supply Current

Logical One Input Voltage

Logical Zero Input Voltage

Output High Voltage

Output Low Voltage

IAVCC, IDVCC

-

55

-

mADC

IAVDD

-

60

-

mADC

VIH

3.325

-

-

V

VIL

-

-

1.575

V

VOH

2.6

-

-

V

VOL

-

-

0.4

V

AC Electrical Specifications

PARAMETER

RESET Pulse Width

MCLK Period (25.6MHz)

RCLK Period (2.048MHz)

RCLK High

RCLK Low

CCLK Period (5MHz)

CCLK High

CCLK Low

CDATA Setup to CCLK

CDATA Hold from CCLK

C_EN Strobe Edge to CCLK

TXCLK Period (256kHz)

TXCLK High

TXCLK Low

TX_DATA Setup to TXCLK

TX_DATA Hold from TXCLK

AVCC, DVCC = +5V, AVDD = +9V; RCLK = 2.048MHz; MCLK = 25.6MHz;

TA = 0oC to 70oC

SYMBOL

MIN

TYP

MAX

tRES

tMCP

tRCP

tRCH

tRCL

tCCP

tCCH

tCCL

tCDS

tCDH

tCES

tDCP

tDCH

tDCL

tDIS

tDIH

500

-

-

-

39.1

-

-

488

-

98

-

-

98

-

-

200

-

-

150

-

-

150

-

-

50

-

-

-

-

50

-100

-

100

-

3910

-

195

-

-

195

-

-

150

-

-

0

-

-

UNIT

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

7-74

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