datasheetbank_Logo
전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

ST7549T 데이터 시트보기 (PDF) - Sitronix Technology Co., Ltd.

부품명
상세내역
일치하는 목록
ST7549T
SITRONIX
Sitronix Technology Co., Ltd. SITRONIX
ST7549T Datasheet PDF : 52 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ST7549T
Pin Name
I/O
D7 to D6 (SA)
D5 to D4(X)
D3 to D2 (SDA_OUT)
D1 (SDA_IN)
D0 (SCLK)
LCD DRIVER SUPPLY
Pin Name
I/O
OSC
I
Power Supply Pins
Pin Name
I/O
VSS
Power
Supply
Description
No. of Pins
When using I2C interface
D0: serial clock input (SCLK)
D1: serial input data (SDA_IN)
D2, D3: (SDA_OUT) serial data acknowledge for the I2C interface. By
connecting SDA_OUT to SDA_IN externally, the SDA line becomes fully
I2C interface compatible. Having the acknowledge output separated
from the serial data line is advantageous in chip on glass (COG)
applications. In COG application where the track resistance from the
SDA_OUT pad to the system SDA line can be significant, a potential
divider is generated by the bus pull-up resistor and the ITO track
resistance. It is possible the during the acknowledge cycle the ST7549T
will not be able to create a valid logic 0 level. By splitting the SDA_IN
input from the SDA_OUT output the device could be used in a mode
that ignores the acknowledge bit. In COG applications where the
acknowledge cycle is required, it is necessary to minimize the track
resistance from the SDA_OUT pad to the system SDA line to guarantee
a valid low level.
D1,D2,D3 must be connected together (SDA)
D4, D5: must fix to H
D6, D7: Is slave address (SA) bit1, 0, must fix to Hor L
Chip select input pins CSBnot used must fix to H
Description
No. of Pins
When the on-chip oscillator is used, this input must be connected
to VDD. An external clock signal, if used, is connected to this input. If
the oscillator and external clock are both inhibited by connecting the
1
OSC pin to VSS the display is not clocked and may be left in a DC state.
To avoid this, the chip should always be put into Power Down Mode
before stopping the clock.
Ground.
Description
No. of Pins
9
Digital Supply voltage:1.7V~3.3V
VDD1
Power The 2 supply rails VDD1 and VDD2 could be connected together.
Supply If Digital Option pin is high, must be this level
5
Analog Supply voltage:2.4V~3.3V
VDD2
Power The 2 supply rails VDD1 and VDD2 could be connected together.
Supply
4
VOUTIN
VOUTOUT
If the internal voltage generator is used, the VOUTIN & VOUTOUT must be
Power connected together. An external supply voltage can be supplied using
Supply the VOUTIN pad. This pad is for external multiple voltage input. In this
2
case, VOUTOUT has to be left open,
If the internal voltage generator is used, the VOUTIN & VOUTOUT must be
Power connected together and series one capacitor to VSS
Supply If an external supply is used this pin must be left open.
2
Ver 1.3
10/52
2005/12/06

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]