ST72260G1 데이터 시트보기 (PDF) - STMicroelectronics
부품명
상세내역
일치하는 목록
ST72260G1
STMicroelectronics
ST72260G1 Datasheet PDF : 171 Pages
| |||
ST72260G, ST72262G, ST72264G
Pin n°
Pin Name
Level
Port / Control
Main
Input
Output Function
(after
reset)
Alternate Function
17 15 E3 PC2/MCO/AIN2
I/O
CT
X ei0/ei1 X
X
X
Port C2
Main clock output (fCPU) or
ADC Analog Input 2
18 16 F4 PC1/OCMP1_B/AIN1 I/O
CT
X ei0/ei1 X
X
X
Port C1
Timer B Output Compare 1 or
ADC Analog Input 1
19 17 D3 PC0/ICAP1_B/AIN0 I/O
CT
X ei0/ei1 X
X
X
Port C0
Timer B Input Capture 1 or
ADC Analog Input 0
20 18 E4 PA7/TDO
21 19 F5 PA6/SDAI
I/O CT HS X
I/O CT HS X
ei0
ei0
X X Port A7 SCI output
T
Port A6 I2C DATA
22 20 F6 PA5 /RDI
23 21 E6 PA4/SCLI
I/O CT HS X
I/O CT HS X
ei0
ei0
X X Port A5 SCI input
T
Port A4 I2C CLOCK
24
E5 NC
25
D6 NC
Not Connected
D5 NC
26 22 C6 PA3
27 23 D4 PA2
C5 NC
B6 NC
I/O CT HS X ei0
I/O CT HS X ei0
X X Port A3
X X Port A2
Not Connected
28 24 A6 PA1/ICCDATA
29 25 A5 PA0/ICCCLK
30 26 B5 ICCSEL
31 27 A4 VSS
32 28 B4 VDD
I/O CT HS X ei0
I/O CT HS X ei0
I CT
X
S
S
X X Port A1 In Circuit Communication Data
X
X
Port A0
In Circuit Communication
Clock
ICC mode pin, must be tied low
Ground
Main power supply
Notes:
1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up
column (wpu) is merged with the interrupt column (int), then the I/O configuration is a pull-up interrupt in-
put, otherwise the configuration is a floating interrupt input. Port C is mapped to ei0 or ei1 by option byte.
2. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to VDD
are not implemented). See Section 9 "I/O PORTS" on page 38 for more details.
3. OSC1 and OSC2 pins connect a crystal or ceramic resonator, an external RC, or an external source to
the on-chip oscillator see Section 2 "PIN DESCRIPTION" on page 6 and Section 6.2 "MULTI-OSCILLA-
TOR (MO)" on page 21 for more details.
9/171
Share Link: