SL74HC4051D 데이터 시트보기 (PDF) - System Logic Semiconductor

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SL74HC4051D

Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS

System Logic Semiconductor 

SL74HC4051

AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)

Symbol

Parameter

tPLH, tPHL Maximum Propagation Delay, Channel-Select to

Analog Output (Figures 8 and 9)

tPLH, tPHL Maximum Propagation Delay , Analog Input to

Analog Output (Figures 10 and 11)

tPLZ, tPHZ Maximum Propagation Delay , Enable to Analog

Output (Figures 12 and 13)

tPZL, tPZH Maximum Propagation Delay , Enable to Analog

Output (Figures 12 and 13)

CIN Maximum Input Capacitance, Channel-Select or

Enable Inputs

CI/O Maximum Capacitance

Analog I/O

All Switches Off

Common O/I

Feedthrough

VCC

Guaranteed Limit

V 25 °C to ≤85°C ≤125°C Unit

-55°C

2.0 370

465

550

ns

4.5 74

93

110

6.0 63

79

94

2.0 60

75

90

ns

4.5 12

15

18

6.0 10

13

15

2.0 290

364

430

ns

4.5 58

73

86

6.0 49

62

73

2.0 345

435

515

ns

4.5 69

87

103

6.0 59

74

87

-

10

10

10

pF

-

35

35

35

pF

-

130

130

130

-

1.0

1.0

1.0

Power Dissipation Capacitance (Per Package)

(Figure 14)

CPD Used to determine the no-load dynamic power

consumption:

PD=CPDVCC2f+ICCVCC

Typical @25°C,VCC=5.0 V, VEE=0 V

45

pF

SLS

System Logic

Semiconductor

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