SC4614 데이터 시트보기 (PDF) - Semtech Corporation
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SC4614 Datasheet PDF : 14 Pages
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SC4614
POWER MANAGEMENT
Applications Information (Cont.)
is given by:
I RMS =
(1 -
D) ×
I
2
IN
+
D × (Io
-
I IN
)2
where Io is the load current, IIN is the input average cur-
rent, and D is the duty cycle. Choosing low ESR input
capacitors will help maximize ripple rating for a given size.
Bootstrap Circuit
The SC4614 uses an external bootstrap circuit to pro-
vide a voltage at the BST pin for the top MOSFET drive.
This voltage, referring to the Phase Node, is held up by a
bootstrap capacitor. Typically, it is recommended to use
a 1uF ceramic capacitor with 16V rating and a commonly
available diode IN4148 for the bootstrap circuit.
Filters for Supply Power
For each pin of DRV and Vcc, it is recommended to use a
1uF/16V ceramic capacitor for decoupling. In addition,
place a small resistor (10 ohm) in between the Vcc pin
and the supply power for noise reduction.
SC4614 AND MOSFETS
RE F
+
Vc
PWM
EA
MODULAT OR
FB
-
L
Vo
OUT
Zf
Zs
COMP
Co
Res r
Fig. 3. Block diagram of the control loop
The model is a second order system with a finite DC gain,
a complex pole pair at Fo, and an ESR zero at Fz, as
shown in Fig. 4. The locations of the poles and zero are
determined by:
CONTROL LOOP DESIGN
The goal of compensation is to shape the frequency re-
sponse charateristics of the buck converter to achieve a
better DC accuracy and a faster transient response for
the output voltage, while maintaining the loop stability.
The block diagram in Fig. 3 represents the control loop
of a buck converter designed with the SC4614. The con-
trol loop consists of a compensator, a PWM modulator,
and a LC filter.
The LC filter and PWM modulator represent the small
signal model of the buck converter operating at fixed
switching frequency. The transfer function of the model
is given by:
VO
VC
=
VIN
Vm
×
1
+
1+
sL
sRESRC
/ R + s2LC
FO =
1
LC
FZ
=
1
RESRC
The compensator in Fig. 3 includes an error amplifier and
impedance networks Zf and Zs. It is implemented by the
circuit in Fig. 5. The compensator provides an integrator,
double poles and double zeros. As shown in Fig. 4, the
integrator is used to boost the gain at low frequency.
Two zeros are introduced to compensate excessive phase
lag at the loop gain crossover due to the integrator
(-90deg) and complex pole pair (-180deg). Two high fre-
quency poles are designed to compensate the ESR zero
and attenuate high frequency noise.
where VIN is the power rail voltage, Vm is the amplitude
of the 500kHz ramp, and R is the equivalent load.
2005 Semtech Corp.
8
www.semtech.com
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