SC1406G 데이터 시트보기 (PDF) - Semtech Corporation
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SC1406G
Semtech Corporation
SC1406G Datasheet PDF : 28 Pages
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SC1406G
POWER MANAGEMENT
Pin Descriptions
Pin
Pin Name Pin Function
1
HYS
Core comparator hysteresis setting.
2
CLSET
Current limit setting.
3
VCOUT
Voltage clamp output. Leave open if not used.
4
VCIN
Voltage clamp input. Tie to GND if not used.
5
VCBYP
Voltage clamp bypass pin. Requires a 1500pF cap from this pin to GND. Leave open if not used.
6
VID4
VID (voltage identification) most significant bit.
7
VID3
VID input
8
VID2
VID input
9
VID1
VID input
10
VID0
VID least significant bit.
11
BASE 25 2.5V Linear regulator drive.
12
FB25
2.5V Linear regulator output feedback.
13
BASE 15 1.5V Linear regulator drive.
14
FB15
1.5V Linear regulator output feedback.
15
EN
Enable. SC1406G is enabled when this logic signal is High. Teamed with the SC1405 driver, this pin can be
connected to the PWRDY pin of the SC1405.
16
PWRGD Power Good. When the main converter output approaches and stays within ±10% of the VID DAC setting, and both
soft-start periods terminate, this signal is pulled up to VCC. During under-voltage lockout, this signal is undefined.
During a SpeedStep transition, PWRGD may toggle one or more times.
17
LBIN
Low battery input. This pin is used to set the minimum voltage to the converter through an external resistor divider.
When the input to this pin is less than 1.225V the SC1406G is held in UVLO regardless of the status of EN.
18
SSLR
Linear regulators soft start. During a normal power-up the external soft-start capacitor (1200pF, typ) is charged by
an internal 1µA current source to set the ramp-up time of the linear regulator outputs, 1.5V and 2.5V. This ramp-up
time is typically 2ms, 6ms max. The capacitor is discharged through an internal switch when EN is low or the VCC
or LBIN pins are under voltage. A new soft-start cycle will not begin until the pin voltage drops below a threshold
of 150mV typical (200mV max). (The linear regulator soft-start current and the core soft-start current track each
other to within ±10%.)
19
SSCORE Main controller CORE output soft start. During a normal power-up the external soft-start capacitor (1800pF, typ) is
charged by an internal 1µA current source to set the ramp-up time of the linear regulator outputs, 1.5V and 2.5V.
This ramp-up time is typically 3ms, 6ms max. The capacitor is discharged through an internal switch when EN is
low or the VCC or LBIN pins are under voltage. A new soft-start cycle will not begin until the pin voltage drops
below a threshold of 150mV typical (200mV max). (The linear regulator soft-start current and the core soft-start
current track each other to within ±10%.)
20
CORE
Main CORE converter output feedback.
21
DAC
Main controller digital to analog output.
22
GND
Ground
23
CO
Comparator output. Main regulator controller output used to drive the input of the MOSFET driver IC, such as the
SC1405.
24
VCC
Supply voltage input. This input is capable of accepting 3.3V or 5.0V supply voltage.
25
CMP
Core comparator input.
26
CMPREF Core comparator reference input.
27
CL
Current limit input.
28
CLREF
Current limit reference input.
ã 2000 Semtech Corp.
7
www.semtech.com
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