PS394 데이터 시트보기 (PDF) - Pericom Semiconductor
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PS394 Datasheet PDF : 8 Pages
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PS394
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Test Circuits/Timing Diagrams
3V
VIN
0V
tR < 20ns
tF < 20ns
50%
+10V
VCOM 0V
–10V
tOFF
tOFF
tOPEN
50%
50%
tON
50%
tON
50%
50%
+10V
–10V
NC_
NO_
Switch Output
COM_
IN_
300 Ohm
Logic
Input
V+ GND V–
+15V
–15V
tOPEN
(Repeat Test for IN2, IN3, and IN4)
Figure 2. Switching-Time Circuit
Capacitance
Meter
C +5V
V+
COM
NC
or
NO
GND
IN _0V or 2.4V
V– C
–5V
Capacitance
Meter
C +5V
V+
COM
NC
or
NO
GND
IN 0V or 2.4V
V– C
–5V
Figure 3. Channel Off Capacitance
Figure 4. Channel On Capacitance
Logic
Input
+3V
0V
VCOM
Switch 0V
Output VCOM
0V
Switch
Output
50%
VO2
VO2
tD
+5V
0.9V0
0.9V0
tD
V+
COM_
IN_
NO
VO1
NC
VO2 RL1
CL1
Logic
GND
V–
RL2
Input
–5V
CL Includes Fixture and Stray Capacitance.
Logic 0 Input
CL2
RL = 1kOhm
CL = 35pF
Figure 5. Break-Before-Make Delay
7
PS8444 01/13/00
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