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HEF4094BP 데이터 시트보기 (PDF) - NXP Semiconductors.

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HEF4094BP
NXP
NXP Semiconductors. NXP
HEF4094BP Datasheet PDF : 20 Pages
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NXP Semiconductors
HEF4094B
8-stage shift-and-store register
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter
Conditions
Min
Max
Unit
VDD
supply voltage
IIK
input clamping current
VI
input voltage
IOK
output clamping current
II/O
input/output current
VI < 0.5 V or VI > VDD + 0.5 V
VO < 0.5 V or VO > VDD + 0.5 V
0.5 +18
V
-
10
mA
0.5
-
VDD + 0.5 V
10
mA
-
10
mA
IDD
Tstg
Tamb
Ptot
supply current
storage temperature
ambient temperature
total power dissipation
-
50
mA
65
+150
C
40
+125
C
DIP16
[1] -
750
mW
SO16, SSOP16 and TSSOP16
[2] -
500
mW
P
power dissipation
per output
-
100
mW
[1] For DIP16 packages: above Tamb = 70 C, Ptot derates linearly with 12 mW/K.
[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.
For (T)SSOP16 package: Ptot derates linearly with 5.5 mW/K above 60 C.
8. Recommended operating conditions
Table 5.
Symbol
VDD
VI
Tamb
t/V
Recommended operating conditions
Parameter
Conditions
supply voltage
input voltage
ambient temperature
in free air
input transition rise and fall rate
VDD = 5 V
VDD = 10 V
VDD = 15 V
Min Typ Max
Unit
3
-
15
V
0
-
40 -
VDD
V
+125 C
-
-
3.75
s/V
-
-
0.5
s/V
-
-
0.08
s/V
HEF4094B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 11 — 29 August 2013
© NXP B.V. 2013. All rights reserved.
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