HEF4094BP 데이터 시트보기 (PDF) - NXP Semiconductors.
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HEF4094BP Datasheet PDF : 20 Pages
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HEF4094B
8-stage shift-and-store register
Rev. 11 — 29 August 2013
Product data sheet
1. General description
The HEF4094B is an 8-stage serial shift register. It has a storage latch associated with
each stage for strobing data from the serial input to parallel buffered 3-state outputs
QP0 to QP7. The parallel outputs may be connected directly to common bus lines. Data is
shifted on positive-going clock transitions. The data in each shift register stage is
transferred to the storage register when the strobe (STR) input is HIGH. Data in the
storage register appears at the outputs whenever the output enable (OE) signal is HIGH.
Two serial outputs (QS1 and QS2) are available for cascading a number of HEF4094B
devices. Serial data is available at QS1 on positive-going clock edges to allow high-speed
operation in cascaded systems with a fast clock rise time. The same serial data is
available at QS2 on the next negative going clock edge. This is used for cascading
HEF4094B devices when the clock has a slow rise time.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +85 C and 40 C to +125 C
Complies with JEDEC standard JESD 13-B
3. Ordering information
Table 1. Ordering information
All types operate from 40 C to +125 C.
Type number
Package
Name
Description
HEF4094BP
DIP16
plastic dual in-line package; 16 leads (300 mil)
HEF4094BT
SO16
plastic small outline package; 16 leads; body width 3.9 mm
HEF4094BTS
SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm
HEF4094BTT
TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm
Version
SOT38-4
SOT109-1
SOT338-1
SOT403-1
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