HI1396(1997) 데이터 시트보기 (PDF) - Intersil

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HI1396
(Rev.:1997)

8-Bit, 125 MSPS, Flash A/D Converter

Intersil 

HI1396

Pin Descriptions and I/O Pin Equivalent Circuits (Continued)

PIN NUMBER

DIP

LCC

STANDARD

VOLTAGE

SYMBOL I/O LEVEL

3

3

LINV

I

ECL

EQUIVALENT CIRCUIT

DGND1

18

32

MINV

I

ECL

R

R

LINV

OR

R

MINV

-1.3V

DESCRIPTION

Input pin for D0 (LSB) to D6

output polarity inversion (see A/D

Output Code Table). Pulled low

when left open.

Input pin for D7 (MSB) output

polarity inversion (see A/D

Output Code Table). Pulled low

when left open.

DVEE

R

30, 34 50, 54

VIN

I VRT to VRB

AGND

VIN

VIN

Analog input pins. These two pins

must be connected externally,

since they are not internally

connected.

AVEE

23

39

VRB

I

-2V

32

52

VRM

I

VRB/2

41

65

VRT

I

0V

VRT R1

VRM R2

VRB R3

R/2

R

COMPARATOR 1

R

COMPARATOR 2

R

COMPARATOR 127

R

COMPARATOR 128

R

COMPARATOR 129

R

COMPARATOR 130

R

COMPARATOR 255

R/2

Reference voltage (bottom).

Typically -2V. Bypass with a 0.1µF

and 10µF to AGND.

Reference voltage mid point. Can

be used as a pin for integral

linearity compensation.

Reference voltage (top) typically

0V. When a voltage different from

AGND is applied to this pin, bypass

with a 0.1µF and 10µF to AGND.

4-1161

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