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NCP606

LDO Regulator - Low IGND, CMOS with/without Enable and with Enhanced 500 mA

ON Semiconductor 

NCP605, NCP606

APPLICATIONS INFORMATION

The NCP605/NCP606 regulator is self*protected with

internal thermal shutdown and internal current limit. Typical

application circuits are shown in Figures 1 to 4.

Input Decoupling (Cin)

A ceramic or tantalum 1.0 mF capacitor is recommended

and should be connected close to the NCP605/NCP606

package. Higher capacitance and lower ESR will improve

the overall line transient response.

Output Decoupling (Cout)

The NCP605/NCP606 is a stable component and does not

require a minimum Equivalent Series Resistance (ESR) for

the output capacitor. The minimum output decoupling value

is 1.0 mF and can be augmented to fulfill stringent load

transient requirements. The regulator works with ceramic

chip capacitors as well as tantalum devices. Larger values

improve noise rejection and load regulation transient

response. Typical characteristics were measured with

Murata ceramic capacitors. GRM219R71E105K (1 mF,

25 V, X7R, 0805) and GRM21BR71A106K (10 mF, 10 V,

X7R, 0805).

No−Load Regulation Considerations

The NCP605/NCP606 adjustable regulator will operate

properly under conditions where the only load current is

through the resistor divider that sets the output voltage.

However, in the case where the NCP605/NCP606 is

configured to provide a 1.250 V output, there is no resistor

divider. If the part is enabled under no−load conditions,

leakage current through the pass transistor at junction

temperatures above 85°C can approach several microamps,

especially as junction temperature approaches 150°C. If this

leakage current is not directed into a load, the output voltage

will rise up to a level approximately 20 mV above nominal.

The NCP605/ NCP606 contains an overshoot clamp

circuit to improve transient response during a load current

step release. When output voltage exceeds the nominal by

approximately 20 mV, this circuit becomes active and

clamps the output from further voltage increase. Tying the

ENABLE pin to Vin (NCP606 only) will ensure that the part

is active whenever the supply voltage is present, thus

guaranteeing that the clamp circuit is active whenever

leakage current is present.

When the NCP606 adjustable regulator is disabled, the

overshoot clamp circuit becomes inactive and the pass

transistor leakage will charge any capacitance on Vout. If no

load is present, the output can charge up to within a few

millivolts of Vin. In most applications, the load will present

some impedance to Vout such that the output voltage will be

inherently clamped at a safe level. A minimum load of

10 mA is recommended.

Unlike LP8345, for NCP605/606 fixed voltage versions

there is no limitation for minimum load current.

Noise Decoupling

The NCP605/NCP606 is a low noise regulator and needs

no external noise reduction capacitor. Unlike other low noise

regulators which require an external capacitor and have slow

startup times, the NCP605/NCP606 operates without a noise

reduction capacitor, has a typical 8 ms turn−on time and

achieves a 50 mVrms overall noise level between 10 Hz and

100 kHz.

Enable Operation (NCP606 Only)

The enable pin will turn the regulator on or off. The

threshold limits are covered in the electrical characteristics

table in this data sheet. The turn−on/turn−off transient

voltage being supplied to the enable pin should exceed a

slew rate of 10 mV/ms to ensure correct operation. If the

enable function is not to be used then the pin should be

connected to Vin.

Output Voltage Adjust

The output voltage can be adjusted from 1 times (Figure

4) to 4 times (Figure 3) the typical 1.250 V regulation

voltage via the use of resistors between the output and the

ADJ input. The output voltage and resistors are chosen using

Equation 1 and Equation 2.

ǒ Ǔ Vout + 1.250

1 ) R1

R2

) ǒIADJ

R1Ǔ

(eq. 1)

R2

^

R1

Vout *

1

1.25

(eq. 2)

Input bias current IADJ is typically less than 150 nA.

Choose R1 arbitrarily to minimize errors due to the bias

current and to minimize noise contribution to the output

voltage. Use Equation 2 to find the required value for R2.

Thermal

As power in the NCP605/NCP606 increases, it might

become necessary to provide some thermal relief. The

maximum power dissipation supported by the device is

dependent upon board design and layout. Mounting pad

configuration on the PCB, the board material, and the

ambient temperature affect the rate of junction temperature

rise for the part. When the NCP605/NCP606 has good

thermal conductivity through the PCB, the junction

temperature will be relatively low with high power

applications. The maximum dissipation the

NCP605/NCP606 can handle is given by:

ƪ ƫ TJ(MAX) * TA

PD(MAX) +

RQJA

(eq. 3)

Since TJ is not recommended to exceed 125°C (TJ(MAX)),

then the NCP605/NCP606 soldered on 645 mm2, 1 oz

copper area, FR4 can dissipate up to 1.3 W when the ambient

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