NCP1034(2008) 데이터 시트보기 (PDF) - ON Semiconductor

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NCP1034
(Rev.:2008)

100V Synchronous PWM Buck Controller

ON Semiconductor 

High−Side

Logic Signal

NCP1034

tdead

tdead

Low−Side

Logic Signal

RDSmax

High−Side

MOSFET

RDS(on)min

RDSmax

Low−Side

MOSFET

RDS(on)min

td(on)

tf

tr

td(off)

tr

tf

td(on)

td(off)

Figure 23. MOSFETs Timing Diagram

MOSFETs delays, turn−on and turn−off times must be

short enough to prevent cross conduction. If not, there will

be cross conduction from the input through both MOSFETs

to ground. Due to this fact, the following conditions must be

true:

td(on)high ) tdead u td(off)low ) tf low

td(on)low ) tdead u td(off)high ) tf high

(eq. 14)

Where tdead is the controller dead band time, td(on), tr, td(off)

and tf are MOSFETs parameters. These parameters can be

found in the datasheet for specific conditions.

Bootstrap Circuit

This circuit is used to obtain a voltage higher than the

input voltage in order to switch−on high side N MOSFET.

The bootstrap capacitor is charged from the IC’s supply

voltage through D1, when the low side MOSFET is

switched−on up to the IC’s supply voltage. It must have

enough capacity to supply power for the high−side circuit

when the high−side MOSFET is being switched on. The

minimum value recommended for the bootstrap capacitor is

100 nF. Diode D1 has to be designed to withstand a reverse

voltage given by the following equation:

D1VRmin + VIN * VCC

(eq. 15)

Soft−Start

The soft−start time is set by capacitor connected between

SS/SD Pin and ground. This function is used for controlling

the output voltage slope and limiting startup currents. The

start−up sequence initiates when Power On Ready (POR)

internal signal rises to logic high level. That means the

supply voltage, low side drive supply voltage and external

UVLO are over the set thresholds. The soft−start capacitor

is charged by 20 mA current source. If POR is low, the SS/SD

Pin is internally pulled to GND, which means that the

NCP1034 is in a shutdown state. The SS/SD Pin voltage

(0 V to 2.6 V) controls internal current source (64 mA to

0 mA) with negative linear characteristic. This current

source injects current into the resistor (25 kW) connected

between the Fb pin and negative input of the error amplifier

and into the external feedback resistor network. Voltage

drop on these resistors is over 1.6 V, which is enough to force

the error amplifier into negative saturation state and to block

switching.

When the soft−start pin reaches around 1.2 V (exact value

depends on feedback and compensation network and on

soft−start capacitor; a larger soft−start capacitor and a lower

compensation capacity decrease this level) the IC starts

switching. The impact of controlled current source

decreases and the output voltage starts to rise. When the

soft−start capacitor voltage reaches 2.6 V, the output voltage

is at nominal value.

The soft−start time must be at least 10 times longer than

the time needed to charge the compensation network from

the output of the error amplifier. If the soft−start time is not

long enough, the soft−start sequence would be faster than the

charging compensation network and the IC would start

without slowly increasing the output voltage. The soft−start

capacitance can be calculated using Equation 16.

CSS + 15 @ 10−6 @ TSS

(eq. 16)

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