MT9123AE 데이터 시트보기 (PDF) - Mitel Networks

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MT9123AE

Dual Voice Echo Canceller

Mitel Networks 

Preliminary Information

MT9123

AC Electrical Characteristics† - Microport Timing (see Figure 17)

Characteristics

Sym Min Max Units

Test Notes

1 Input Data Setup

tIDS

100

ns

2 Input Data Hold

tIDH

30

ns

3 Output Data Delay

tODD

100

ns

4 Serial Clock Period

tSCP

500

ns

5 SCLK Pulse Width High

tSCH

250

ns

6 SCLK Pulse Width Low

tSCL

250

ns

7 CS Setup-Intel

tCSSI

200

ns

8 CS Setup-Motorola

tCSSM

100

ns

9 CS Hold

tCSH

100

ns

10 CS to Output High Impedance

tOHZ

100

ns

† Timing is over recommended temperature range and recommended power supply voltages.

CL=150pF

CL=150pF

Characteristic

Symbol

TTL Pin

CMOS Pin

TTL reference level

VTT

1.5

-

CMOS reference level

VCT

-

0.5*VDD

Input HIGH level

VH

2.4

0.9*VDD

Input LOW level

VL

0.4

0.1*VDD

Rise/Fall HIGH measurement point

VHM

2.0

0.7*VDD

Rise/Fall LOW measurement point

VHL

0.8

0.3*VDD

Table 8 - Reference Level Definition for Timing Measurements

Units

V

V

V

V

V

V

MCLK (3)

VH

VL

tMCH

tMCL

VCT

Notes: 1. CMOS output

2. TTL input compatible

3. CMOS input

(see Table 8 for symbol definitions)

Figure 16 Master Clock - MCLK

8-69

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