MT8979 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc
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MT8979 Datasheet PDF : 34 Pages
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CHANNEL
31
CHANNEL
0
MT8979
Data Sheet
125µs
•••
CHANNEL
30
CHANNEL CHANNEL
31
0
Most
Significant BIT
7
Bit (First)
BIT
6
BIT BIT
5
4
BIT
3
BIT
2
BIT
1
BIT
0
Least
Significant
Bit (Last)
(8/2.048)µs
Figure 7 - ST-BUS Stream Format
ST-BUS Interface
The ST-BUS is a synchronous time division multiplexed serial bus with data streams operating at 2048 kbit/s and
configured as 32, 64 kbit/s channels (refer Figure 7). Synchronization of the data transfer is provided from a frame
pulse, which identifies the frame boundaries and repeats at an 8 kHz rate. Figure 17 shows how the frame pulse
(F0i) defines the ST-BUS frame boundaries. All data is clocked into the device on the falling edge of the
2048 kbit/s clock (C2i), while data is clocked out on the rising edge of the 2048 kbit/s clock at the start of the bit cell.
Data Input (DSTi)
The MT8979 receives information channels on the DSTi pin. Of the 32 available channels on this serial input, 30
are defined as information channels. They are channels 1-15 and 17-31. These 30 timeslots are the 30 telephone
channels of the CEPT format numbered 1-15 and 16-30. Timeslot 0 and 16 are unused to allow the
synchronization and signalling information to be inserted, from the Control Streams (CSTi0 and CSTi1). The
relationship between the input and output ST-BUS stream and the CEPT line is illustrated in Figures 8 to 12. In
common channel signalling mode timeslot 16 becomes an active channel. In this mode channel 16 on DSTi is
transmitted on timeslot 16 of the CEPT link unaltered. This mode is activated by bit 5 of channel 31 of CSTi0.
Control Input 0 (CSTi0)
All the necessary control and signalling information is input through the two control streams. Control ST-BUS
input number 0 (CSTi0) contains the control information that is associated with each information channel. Each
control channel contains the per channel digital attenuation information, the individual loopback control bit, and the
voice or data channel identifier, see Table 2. When a channel is in data mode (B7 is high) the digital attenuation
and Alternate Digit Inversion are disabled. It should be noted that the control word for a given information channel
is input one timeslot early, i.e., channel 0 of CSTi0 controls channel 1 of DSTi. Channels 15 and 31 of CSTi0
contain Master Control Words 1 and 2, which are used to set up the interface feature as seen by the respective bit
functions of Tables 3 and 4.
Control Input 1 (CSTi1)
Control ST-BUS input stream number 1 (CSTi1) contains the synchronization information and the A, B, C & D
signalling bits for insertion into timeslot 16 of the CEPT stream (refer to Tables 5 to 8). Timeslot 0 contains the four
zeros of the multiframe alignment signal plus the XYXX bits (see Figure 5). Channels 1 to 15 of CSTi1 contain the
A, B, C & D signalling bits as defined by the CEPT format (see Figure 5), i.e., channel 1 of CSTi1 contains the
A,B,C & D bits for DSTi timeslots 1 and 17. Channel 16 contains the frame alignment signal, and channel 17
contains the non-frame alignment signal (see Figure 4). Channel 18 contains the Master Control Word 3 (see Table
9). Figure 11 shows the relationship between the control stream (CSTi1) and the CEPT stream.
7
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