MT8980DP1 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc
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MT8980DP1 Datasheet PDF : 20 Pages
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MT8980D
Data Sheet
Application Circuit with 6802 Processor
Fig. 10 shows an example of a complete circuit which may be used to evaluate the chip.
For convenience, a 4 MHz crystal oscillator has been used rather than a 4.096 MHz clock, as both are within the
limits of the chip’s specifications. The RC delay used with the 393 counters ensures a sufficient hold time for the
FP signal, but the values used may have to be changed if faster 393 counters become available.
The chip is shown as memory mapped into the MEK6802D3 system. Chip addresses 00-3F correspond to
processor addresses 2000-203F. Delay through the address decoder requires the VMA signal to be used twice to
remove glitches. The MEK6802D3 board uses a 10 KΩ pullup on the MR pin, which would have to be incorporated
into the circuit if the board was replaced by a processor.
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