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ML4821CP 데이터 시트보기 (PDF) - Micro Linear Corporation

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ML4821CP
Micro-Linear
Micro Linear Corporation Micro-Linear
ML4821CP Datasheet PDF : 12 Pages
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ML4821
FUNCTIONAL DESCRIPTION
OSCILLATOR
The ML4821 oscillator charges the external capacitor
connected to CT with a current equal to 2.5/RT. When the
capacitor voltage reaches the upper threshold, the
comparator changes state and the capacitor discharges to
the lower threshold through Q1.
The oscillator period can be described by the following
relationship:
TOSC = TRAMP + TDISCHARGE
where:
TRAMP = C(Ramp Valley to Peak) ÷ (IRT/2)
and:
TDISCHARGE = C(Ramp Valley to Pk) ÷ (8.4mA – IRT/2)
CLOCK
tD
RAMP PEAK
CT
RAMP VALLEY
The ML4821 oscillator includes a SYNC input for
synchronizing to an external frequency source. A positive
pulse on this pin of 2V (typ) resets the oscillators
comparator and initiates a discharge cycle for CT. The RT
and CT component values which set the ML4821
oscillator frequency should be selected to produce a
lower frequency than the external frequency source.
VOLTAGE AND CURRENT ERROR AMPLIFIERS
The ML4821 voltage error amplifier is a high open loop
gain, wide bandwidth amplifier with a class A output. The
soft start circuit controls the input to this amplifier for
closed loop soft start operation.
The current error amplifier (IA) is similar to the voltage
error amplifier but is designed for very low offsets to allow
the selection of a low value resistor for RSENSE.
OUTPUT DRIVER STAGE
The ML4821 Output Driver is a 1A peak output high
speed totem pole circuit designed to quickly drive
capacitive loads, such as power MOSFET gates. The driver
circuit’s output voltage is internally limited to 17V.
GAIN MODULATOR
The ML4821 gain modulator responds linearly to current
injected into the ISINE pin, and in an inverse-square
fashion to voltage on the VRMS pin. At very low voltages
on the VRMS pin, the gain modulator enforces a power
limit, or ”brown-out protection”, upon the overall PFC
circuit (Figures 6 and 7). The rectified line input sine wave
is converted to a current for the ISINE input via a dropping
resistor. In this way, most ground noise produces an
insignificant effect on the reference to the PWM
comparator. This gives the ML4821 a high degree of
immunity to the disturbances common in high-power
switching circuits.
RT
RT
IRT
VREF
IRT
2
1000
CT
+
CT
8.4mA
150pF
100
Q1
SYNC
Q2
2k
1k
330pF
1nF
470pF
680pF
10
0
10
20
30
40
50
RT (k)
Figure 1. Oscillator Block Diagram.
Figure 2. Oscillator Timing Resistance vs. Frequency.
6
Micro Linear

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