MCM6949YJ10R 데이터 시트보기 (PDF) - Motorola => Freescale
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MCM6949YJ10R Datasheet PDF : 10 Pages
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WRITE CYCLE 2 (E Controlled; See Notes 1, 2, and 3)
MCM6949–8 MCM6949–10 MCM6949–12 MCM6949–15
Parameter
Symbol Min Max Min Max Min Max Min Max Unit Notes
Write Cycle Time
tAVAV
8
—
10
—
12
—
15
—
ns
4
Address Setup Time
tAVEL
0
—
0
—
0
—
0
—
ns
Address Valid to End of Write
tAVEH
7
—
9
—
10
—
12
—
ns
Address Valid to End of Write (G High)
tAVEH
7
—
8
—
9
—
10
—
ns
Enable Pulse Width
tELEH,
8
—
9
—
10
—
12
—
ns
5, 6
tELWH
Enable Pulse Width (G High)
tELEH,
7
—
8
—
9
—
10
—
ns
5, 6
tELWH
Data Valid to End of Write
tDVEH
5
—
5
—
6
—
7
—
ns
Data Hold Time
tEHDX
0
—
0
—
0
—
0
—
ns
Write Recovery Time
tEHAX
0
—
0
—
0
—
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus
contention conditions during read and write cycles.
3. If G goes low coincident with or after W goes low, the output will remain in a high–impedance state.
4. All write cycle timing is referenced from the last valid address to the first transitioning address.
5. If E goes low coincident with or after W goes low, the output will remain in a high–impedance condition.
6. If E goes high coincident with or before W goes high, the output will remain in a high–impedance condition.
A (ADDRESS)
E (CHIP ENABLE)
WRITE CYCLE 2 (E Controlled; See Notes 1, 2, and 3)
tAVAV
tAVEH
tELEH
tAVEL
tELWH
tEHAX
W (WRITE ENABLE)
tDVEH
D (DATA IN)
Q (DATA OUT)
HIGH–Z
DATA VALID
tEHDX
Motorola Memory Prefix
ORDERING INFORMATION
(Order by Full Part Number)
MCM 6949 XX XX XX
Shipping Method (R = Tape and Reel, Blank = Rails)
Part Number
Speed (8 = 8 ns, 10 = 10 ns, 12 = 12 ns,
15 = 15 ns)
Package (YJ = 400 mil SOJ)
Full Part Numbers — MCM6949YJ8
MCM6949YJ10
MCM6949YJ8R MCM6949YJ10R
MCM6949YJ12
MCM6949YJ12R
MCM6949YJ15
MCM6949YJ15R
MOTOROLA FAST SRAM
MCM6949
9
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