MAX509ACAP 데이터 시트보기 (PDF) - Maxim Integrated

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MAX509ACAP

Quad, Serial 8-Bit DACs with Rail-to-Rail Outputs

Maxim Integrated 

Quad, Serial 8-Bit DACs

with Rail-to-Rail Outputs

______________________________________________________________Pin Description

PIN

MAX509 MAX510

1

1

2

2

3

3

4

–

–

4

5

–

6

5

7, 14

–

8

6

9

7

10

8

11

9

12

10

13

11

15

12

16

–

–

13

17

–

18

14

19

15

20

16

NAME

OUTB

OUTA

VSS

REFB

REFAB

REFA

AGND

N.C.

DGND

LDAC

DOUT

CLR

DIN

SCLK

CS

REFD

REFCD

REFC

VDD

OUTD

OUTC

FUNCTION

DAC B Voltage Output

DAC A Voltage Output

Negative Power Supply, 0V to -5V ±10%. Connect to AGND for single-supply operation.

Reference Voltage Input for DAC B

Reference Voltage Input for DACs A and B

Reference Voltage Input for DAC A

Analog Ground

Not Internally Connected

Digital Ground

Load DAC Input (active low). Driving this asynchronous input low (level sensitive)

transfers the contents of each input latch to its respective DAC latch.

Serial Data Output. Can sink and source current. Data at DOUT is adjustable to be

clocked out on rising or falling edge of SCLK.

Clear DAC input (active low). Driving CLR low causes an asynchronous clear of input

and DAC registers and sets all DAC outputs to zero.

Serial Data Input. TTL/CMOS-compatible input. Data is clocked into DIN on the

rising edge of SCLK. CS must be low for data to be clocked in.

Serial Clock Input. Data is clocked in on the rising edge and clocked out on either the

rising (default) or the falling edge.

Chip-Select Input (active low). Data is shifted in and out when CS is low. Programming

commands are executed when CS rises.

Reference Voltage Input for DAC D

Reference Voltage Input for DACs C and D

Reference Voltage Input for DAC C

Positive Power Supply, +5V ±10%

DAC D Output Voltage

DAC C Output Voltage

8 _______________________________________________________________________________________

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