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MAX3982 데이터 시트보기 (PDF) - Maxim Integrated

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MAX3982
MaximIC
Maxim Integrated MaximIC
MAX3982 Datasheet PDF : 15 Pages
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SFP Copper-Cable Preemphasis Driver
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.0V to +3.6V, TA = 0°C to +85°C. Typical values are at TA = +25°C and VCC = +3.3V, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
EQUALIZER AND CABLE DRIVER SPECIFICATIONS
Input Swing
Measured differentially at point A of Figure
2 (Note 1)
Input Resistance
Measured differentially
Input Return Loss
100MHz to 2GHz (Note 1)
Differential Output Swing
Measured
differentially at point
B of Figure 2
(Notes 1, 2)
TX_DISABLE = low,
OUTLEV = high
TX_DISABLE = low,
OUTLEV = low
TX_DISABLE = high
MIN
600
85
10
1450
1000
TYP
100
40
MAX UNITS
2000
115
1800
1350
mVP-P
dB
mVP-P
Common-Mode Output
(OUT+) + (OUT-), measured at point B of
Figure 2; TX_DISABLE = low, OUTLEV =
high (Notes 1, 2)
60
mVP-P
Output Resistance
Output Return Loss
Output Transition Time
Random Jitter
Output Preemphasis
Residual Output Deterministic
Jitter at 1.0625Gbps to
2.125Gbps (Notes 1, 4, 5)
Residual Output Deterministic
Jitter at 4.25Gbps (Notes 1, 4, 5)
OUT+ or OUT- to VCC, single ended
100MHz to 2GHz (Note 1)
42
50
58
10
dB
tr, tf
20% to 80% (Notes 1, 3)
50
80
ps
(Notes 1, 3)
1.6 psRMS
PE1 PE0
00
2
See Figure 1
01
4
dB
10
8
11
14
Source to IN OUT to Load PE1 PE0
1m, 24AWG 0 0
6 mil
FR4 10in
5m, 24AWG 0 1
10m, 24AWG 1 0
0.10 0.15 UIP-P
15m, 24AWG 1 1
Source to IN OUT to Load PE1 PE0
1m, 24AWG 0 0
6 mil
FR4 10in
5m, 24AWG 0 1
10m, 24AWG 1 0
0.15 0.20 UIP-P
15m, 24AWG 1 1
Note 1: Guaranteed by design and characterization.
Note 2: PE1 = PE0 = 1 for maximum preemphasis, load is 50±1% at each side, and the pattern is 0000011111 at 1Gbps.
Note 3: Measured at point B in Figure 2 using 0000011111 at 1Gbps. PE1 = PE0 = 0 for minimum preemphasis. For transition time,
the 0% reference level is the steady-state level after four zeros, just before the transition. The 100% reference level is the
maximum voltage of the transition.
Note 4: Tested with CJTPAT, as well as this pattern: 19 zeros, 1, 10 zeros, 1010101010 (D21.5 character), 1100000101 (K28.5+
character), 19 ones, 0, 10 ones, 0101010101 (D10.2 character), 0011111010 (K28.5 character).
Note 5: Cables are unequalized, Amphenol Spectra-Strip 24AWG. Residual deterministic jitter is the difference between the source
jitter at point A, and load jitter at point D in Figure 2. The deterministic jitter at the output of the transmission line must be
from media-induced loss and not from clock-source modulation.
_______________________________________________________________________________________ 3

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