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MAX1980

Quick-PWM Slave Controller with Driver Disable for Multiphase DC-DC Converter

Maxim Integrated 

Quick-PWM Slave Controller with

Driver Disable for Multiphase DC-DC Converter

ELECTRICAL CHARACTERISTICS (continued)

(Circuit of Figure 1, V+ = 15V, VCC = VDD = 5V, VOUT = VCOMP = 1.2V, VCM+ = VCM- = VCS+ = VCS- = 1.2V, DD = VCC , TA = -40°C

to +100°C, unless otherwise noted.) (Note 5)

PARAMETER

CURRENT SENSING

On-Time Adjustment Range

COMP Output Current

Current-Balance Offset

SYMBOL

CONDITIONS

ICOMP

0.42V < VCOMP < 2.8V, VOUT ≥ 0.7V

Sink and source

(VCM+ - VCM-) - (VCS+ - VCS-), ICOMP = 0,

-100mV ≤ (VCM+ - VCM-) ≤ +100mV

MIN TYP MAX UNITS

-40

+40

%

30

µA

-2.0

+2.0 mV

Current-Sense, Common-Mode

Range

Positive Current-Limit Threshold

Negative Current-Limit

Threshold

ILIM Standby Threshold Voltage

FAULT PROTECTION

CM+, CM-, CS+, CS-

VC_LIM

VCM+ - VCM- and

VCS+ - VCS-

VCS+ - VCS-

VILIM = 0.5V

VILIM = 1V

VILIM = 0.5V

VILIM = 1V

-0.2

47.5

97

-80

-160

0.2

+2.0

V

52.5

mV

103

-70

mV

-140

0.3

V

VCC Undervoltage Lockout

Threshold

GATE DRIVERS

Rising edge, hysteresis = 20mV, switching

disabled below this level

3.45

3.90

V

DH Gate-Driver On-Resistance

(Note 3)

DL Gate-Driver On-Resistance

(Note 3)

LOGIC

TRIG Logic Levels

TON Logic Levels

RON(DH) VBST - VLX forced to 5V

High state (pullup)

RON(DL)

Low state (pulldown)

VTRIG

VTON

350mV hysteresis

High

Low

Logic high (VCC; 200kHz operation)

Open (300kHz operation)

Logic low (GND; 550kHz operation)

3.0

VCC - 0.4

1.6

4.5

Ω

4.5

Ω

2.0

V

1.2

3.1

V

0.5

Note 1: On-time specifications are measured from 50% point to 50% point at the DH pin with LX = PGND, VBST = 5V, and a 500pF

capacitor from DH to LX to simulate external MOSFET gate capacitance. Actual in-circuit times may be different due to

MOSFET switching speeds.

Note 2: The trigger delay time, tTRIG, is measured from the time the TRIG pin transitions to the time when the DL pin goes low.

Note 3: Production testing limitations due to package handling require relaxed maximum on-resistance specifications for the QFN

package.

Note 4: The driver-disable delay time (tDD) is measured from the time the DD pin transitions to the time when the DL or DH pin tran-

sitions.

Note 5: Specifications to -40°C and +100°C are guaranteed by design and not production tested.

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