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M38B50E1H-E107FP 데이터 시트보기 (PDF) - Mitsumi

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M38B50E1H-E107FP
Mitsumi
Mitsumi Mitsumi
M38B50E1H-E107FP Datasheet PDF : 355 Pages
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BEFORE USING THIS USER’S MANUAL
This user’s manual consists of the following three chapters. Refer to the chapter appropriate to your conditions,
such as hardware design or software development.
1. Organization
q CHAPTER 1 HARDWARE
This chapter describes features of the microcomputer and operation of each peripheral function.
q CHAPTER 2 APPLICATION
This chapter describes usage and application examples of peripheral functions, based mainly on
setting examples of relevant registers.
q CHAPTER 3 APPENDIX
This chapter includes a list of registers, and necessary information for systems development using
the microcomputer, the mask ROM confirmation (for mask ROM version), ROM programming confirmation,
and the mark specifications which are to be submitted when ordering.
2. Structure of Register
The figure of each register structure describes its functions, contents at reset, and attributes as follows:
Bits
(Note 2)
Bit attributes
b7 b6 b5 b4 b3 b2 b1 b0
(Note 1)
Contents immediately after reset release
0
CPU mode register (CPUM) [Address : 3B 16]
b
Name
0 Processor mode bits
1
2 Stack page selection bit
Functions
b1 b0
0 0 : Single-chip mode
01:
1 0 : Not available
11:
0 : 0 page
1 : 1 page
At reset R W
0
0
0
3 Nothing arranged for these bits. These are write disabled
0
!
4 bits. When these bits are read out, the contents are “0.”
0
!
5 Fix this bit to “0.”
0
b7 b6
6 Main clock division ratio selection 0 0 : φ = XIN/2 (High-speed mode)
1
bits
0 1 : φ = XIN/8 (Middle-speed mode)
1 0 : φ = XIN/8 (Middle-speed mode)
7
1 1 : φ = XIN (Double-speed mode)
0
: Bit in which nothing is arranged
: Bit that is not used for control of the corresponding function
Notes 1: Contents immediately after reset release
0••••••“0” at reset release
1••••••“1” at reset release
Undefined••••••Undefined or reset release
T ••••••Contents determined by option at reset release
2: Bit attributes••••••The attributes of control register bits are classified into 3 bytes : read-only, write-only
and read and write. In the figure, these attributes are represented as follows :
R••••••Read
••••••Read enabled
!••••••Read disabled
W••••••Write
••••••Write enabled
! ••••••Write disabled

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