M24M01-HR 데이터 시트보기 (PDF) - STMicroelectronics

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M24M01-HR

1 Mbit serial I²C bus EEPROM

STMicroelectronics 

M24M01-R, M24M01-W, M24M01-HR

Figure 7. I2C bus protocol

SCL

SDA

START

Condition

SDA

Input

SDA

Change

Signal description

STOP

Condition

SCL

SDA

1

2

3

MSB

START

Condition

7

8

9

ACK

SCL

1

2

3

7

8

9

SDA

MSB

ACK

STOP

Condition

AI00792B

Table 2.

Device select code

Device type identifier(1)

Chip Enable

address(2)

A16

RW

b7

b6

b5

b4

b3

b2

b1

b0

Device select code

1

0

1

0

E2

E1

A16

RW

1. The most significant bit, b7, is sent first.

2. E1 and E2 are compared against the respective external pins on the memory device.

Table 3. Most significant address byte

b15

b14

b13

b12

b11

b10

b9

b8

Table 4. Least significant address byte

b7

b6

b5

b4

b3

b2

b1

b0

Doc ID 12943 Rev 7

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