L3G4200D 데이터 시트보기 (PDF) - STMicroelectronics
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L3G4200D Datasheet PDF : 24 Pages
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L3G4200D
Mechanical and electrical specifications
2.3.2
I2C - Inter IC control interface
Subject to general operating conditions for Vdd and Top.
Table 7. I2C slave timing values
Symbol
Parameter
I2C Standard mode(1)
Min
Max
f(SCL)
tw(SCLL)
tw(SCLH)
tsu(SDA)
th(SDA)
SCL clock frequency
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
0
100
4.7
4.0
250
0
3.45
tr(SDA) tr(SCL) SDA and SCL rise time
1000
tf(SDA) tf(SCL) SDA and SCL fall time
300
th(ST)
START condition hold time
4
tsu(SR)
Repeated START condition
setup time
4.7
tsu(SP)
STOP condition setup time
4
tw(SP:SR)
Bus free time between STOP
and START condition
4.7
1. Data based on standard I2C protocol requirement, not tested in production.
2. Cb = total capacitance of one bus line, in pF.
I2C Fast mode (1)
Min
Max
0
400
1.3
0.6
100
0
0.9
20 + 0.1Cb (2)
300
20 + 0.1Cb (2)
300
0.6
0.6
0.6
1.3
Unit
kHz
µs
ns
µs
ns
µs
Figure 5. I2C slave timing diagram (3)
START
SDA
REPEATED
START
tsu(SR)
tw(SP:SR)
START
tf(SDA)
SCL
tr(SDA)
tsu(SDA)
th(SDA)
tsu(SP)
STOP
th(ST) tw(SCLL)
tw(SCLH)
tr(SCL)
tf(SCL)
3 Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both ports
Doc ID 17116 Rev 1
11/24
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