IS61LPS12832A-200TQ 데이터 시트보기 (PDF) - Integrated Silicon Solution

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IS61LPS12832A-200TQ

128K x 32, 128K x 36, 256K x 18 4 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM

Integrated Silicon Solution 

IS61(64)LPS12832A

IS61(64)LPS12836A IS61(64)VPS12836A

IS61(64)LPS25618A IS61(64)VPS25618A

ISSI ®

119 BGA PACKAGE PIN CONFIGURATION

256KX18 (TOP VIEW)

1

2

3

4

5

6

7

A

VDDQ

B

NC

A

CE2

A

ADSP

A

A

ADSC

A

A

CE2

VDDQ

NC

C

NC

A

A

VDD

A

A

NC

D

DQb

NC

Vss

NC

Vss

DQPa NC

E

NC

DQb

Vss

CE

Vss

NC

DQa

F

VDDQ

NC

Vss

OE

Vss

DQa

VDDQ

G

NC

DQb

BWb

ADV

Vss

NC

DQa

H

DQb

NC

Vss

GW

Vss

DQa

NC

J

VDDQ

VDD

NC

VDD

NC

VDD

VDDQ

K

NC

DQb

Vss

CLK

Vss

NC

DQa

L

DQb

NC

Vss

NC

BWa

DQa

NC

M

VDDQ

DQb

Vss

BWE

Vss

NC

VDDQ

N

DQb

NC

Vss

A1*

Vss

DQa

NC

P

NC

DQPb

Vss

A0*

Vss

NC

DQa

R

NC

A

MODE

VDD

NC

A

NC

T

NC

A

A

NC

A

A

ZZ

U

VDDQ

NC

NC

NC

NC

NC

VDDQ

Note: * A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired.

PIN DESCRIPTIONS

Symbol

A

A0, A1

ADV

ADSP

ADSC

GW

CLK

CE, CE2, CE2

BWx (x=a,b)

BWE

Pin Name

Address Inputs

Synchronous Burst Address Inputs

Synchronous Burst Address

Advance

Address Status Processor

Address Status Controller

Global Write Enable

Synchronous Clock

Synchronous Chip Select

Synchronous Byte Write Controls

Byte Write Enable

Symbol

OE

ZZ

MODE

NC

DQa-DQb

DQPa-Pb

VDD

VDDQ

Vss

Pin Name

Output Enable

Power Sleep Mode

Burst Sequence Selection

No Connect

Data Inputs/Outputs

Output Power Supply

Power Supply

Output Power Supply

Ground

Integrated Silicon Solution, Inc. — 1-800-379-4774

5

Rev. 00A

10/07/04

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