IP2004 데이터 시트보기 (PDF) - International Rectifier
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IP2004 Datasheet PDF : 15 Pages
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Data Sheet No. PD60322
iP2004
VDD
PARAMETER
Supply Current (Stand By)
Supply Current (Operating)
Power-On Reset (POR)
VCC Rising
Hysterisis
ENABLE INPUT
Logic Level Low Threshold (VIL)
Logic Level High Threshold (VIH)
Threshold Hysterisis
Weak pull-down current
Rising Propagation Delay (TPDH)
Falling Propagation Delay (TPDL)
PWM INPUT
Logic Level Low Threshold (VIL)
Logic Level High Threshold (VIH)
Threshold Hysterisis
Weak pull-down current
Rising Propagation Delay (TPDH)
Falling Propagation Delay (TPDL)
Min Typ Max Units
Conditions
-
1.1
2.0
mA
VDD = 5.0V, ENABLE = 0V
-
70
110
mA
VIN = 12V, VDD= EN ABLE = 5.0V,
FSW = 1MHz, 10% DC,
3.7
-
4.5
V
140
185
230
mV
VI Rising & Falling
-
-
0.8
V
2.0
-
-
V
-
100
-
mV
-
10
-
µA
-
40
-
ns
-
75
-
ns
Schmitt Trigger Input
VCC = POR to 6.0V
-
-
0.8
V
2.0
-
-
V
-
100
-
mV
-
2
-
µA
-
50
-
ns
-
35
-
ns
Schmitt Trigger Input
VCC = POR to 6.0V
(Note 4)
Notes:
1. Must not exceed 6.5V.
2. Guaranteed by design, not tested in production.
3. Measurement made with six 10µF (TDK C3225X5R1C106KT or equivalent) ceramic capacitors across VIN to PGND
pins (see Figure 9).
4. TPDH and TPDL are not associated with rise and fall times. Does not affect Power Loss (see Figure 10).
5. Block Temperature is defined as any Die temperature within the package.
Page 3 of 15
www.irf.com
12/22/2007
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