IDT723644 데이터 시트보기 (PDF) - Integrated Device Technology
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IDT723644
Integrated Device Technology
IDT723644 Datasheet PDF : 35 Pages
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IDT723624/723634/723644 CMOS SyncBiFIFO™ WITH BUS-MATCHING
256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
COMMERCIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES O. SUPPLY
VOLTAGE AND OPERATING .REE-AIR TEMPERATURE, CL = 30P.
(Commercial: VCC = 5V ± 10%, TA = 0°C to +70°C)
Commercial
IDT723624L12 IDT723624L15
IDT723634L12 IDT723634L15
IDT723644L12 IDT723644L15
Symbol
tA
tWFF
tREF
tPAE
tPAF
tPMF
Parameter
Access Time, CLKA↑ to A0-A35 and CLKB↑ to B0-B35
Propagation Delay Time, CLKA↑ to FFA/IRA and CLKB↑ to FFB/IRB
Propagation Delay Time, CLKA↑ to EFA/ORA and CLKB↑ to EFB/ORB
Propagation Delay Time, CLKA↑ to AEA and CLKB↑ to AEB
Propagation Delay Time, CLKA to AFA and CLKB↑ to AFB
Propagation Delay Time, CLKA↑ to MBF1 LOW or MBF2 HIGH and CLKB↑ to MBF2
LOW or MBF1 HIGH
Min Max. Min. Max . Unit
2
8
2 10 ns
2
8
2
8
ns
1
8
1
8
ns
1
8
1
8
ns
1
8
1
8
ns
0
8
0
8
ns
tPMR
Propagation Delay Time, CLKA↑ to B0-B35(2)and CLKB↑ to A0-A35(3)
2
8
2 10 ns
tMDV
Propagation Delay Time, MBA to A0-A35 valid and MBB to B0-B35 valid
2
8
2 10 ns
tRSF
Propagation Delay Time, MRS1 or PRS1 LOW to AEB LOW, AFA HIGH, and MBF1
HIGH and MRS2 or PRS2 LOW to AEA LOW, AFB HIGH, and MBF2 HIGH
1
10
1 15 ns
tEN
Enable Time, CSA or W/RA LOW to A0-A35 Active and CSB LOW and W/RB HIGH to
2
6
2 10 ns
B0-B35 Active
tDIS
Disable Time, CSA or W/RA HIGH to A0-A35 at high impedance and CSB HIGH or W/RB 1
6
1
8
ns
LOW to B0-B35 at HIGH impedance
NOTES:
1. Industrial temperature range is available by special order.
2. Writing data to the mail1 register when the B0-B35 outputs are active and MBB is HIGH.
3. Writing data to the mail2 register when the A0-A35 outputs are active and MBA is HIGH.
9
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