IDT72205LB10TF(2000) 데이터 시트보기 (PDF) - Integrated Device Technology

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IDT72205LB10TF
(Rev.:2000)

CMOS SyncFIFO™ 256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18

Integrated Device Technology 

IDT72205LB/72215LB/72225LB/72235LB/72245LB CMOS SyncFIFO™

256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18

WCLK

tCLKH

tCLKL

tENS

tENH

Commercial And Industrial Temperature Ranges

RCLK

tPAE

n + 1 words in FIFO

tPAE

tENS

NOTE:

1. n = PAE offset. Number of data words written into FIFO already = n.

Figure 12. Programmable Almost-Empty Flag Timing

WCLK

tCLKH

tCLKL

(1)

tENS

tENH

RCLK

D – m + 1 words in FIFO memory (1)

tPAF

D – m words

in FIFO memory(2)

tPAF

tENS

n words in FIFO

2766 drw 14

D – m + 1 words

in FIFO memory(1)

NOTES:

2766 drw 15

1. m = PAF offset. D = maximum FIFO Depth. Number of data words written into FIFO memory = 256 - m + 1 for the IDT72205, 512 -m + 1 for the IDT72215,

1,024 - m + 1 for the IDT72225, 2,048 - m + 1 for the IDT72235 and 4,096 - m + 1 for the IDT72245.

2. 256 - m words in IDT72205, 512 - m words in IDT72215, 1,024 - m words in IDT72225, 2,048 - m words in IDT72235 and 4,096 - m words in IDT72245.

Figure 13. Programmable Almost-Full Flag Timing

WCLK

tCLKH

tCLKL

tENS

tENH

RCLK

D/2 words in FIFO memory(1)

tHF

D/2 + 1 words in

FIFO memory(2)

tHF

tENS

D/2 words in

FIFO memory(1)

NOTE:

2766 drw 16

1. D = maximum FIFO Depth = 256 words for the IDT72205, 512 words for the IDT72215, 1,024 words for the IDT72225, 2,048 words for the IDT72235 and

4,096 words for the IDT72245.

Figure 14. Half-Full Flag Timing

12

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