IDT7008L(2018) 데이터 시트보기 (PDF) - Integrated Device Technology

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IDT7008L
(Rev.:2018)

HIGH-SPEED 64K x 8 DUAL-PORT STATIC RAM

Integrated Device Technology 

IDT7008S/L

High-Speed 64K x 8 Dual-Port Static RAM

Pin Configurations(1,2,3) (con't)

Industrial and Commercial Temperature Ranges

63

61

60

58

55

54

11 A7R A9R A10R A12R A15R NC

51

48

46

45

42

NC SEMR OER GND NC

66

64

62

59

56

49

50

47

44

43

40

10 A4R A6R A8R A11R A14R CE1R CE0R R/WR GND NC I/O6R

67

65

09 A3R A5R

57

53

52

A13R GND NC

41

39

I/O7R I/O5R

69

68

08 A1R A2R

72

71

73

07 BUSYR INTR M/S

75

70

74

06 BUSYL A0R GND

76

77

78

05 INT L NC A0L

79

80

04 A1L A2L

IDT7008G

G84(4)

84-PIN PGA

TOP VIEW(5)

38

37

I/O4R I/O3R

33

35

34

I/O0R I/O2R I/O1R

32

31

36

GND Vcc Vcc

28

29

30

GND I/O1L I/O0L

26

27

I/O3L I/O2L

81

83

03 A3L

A5L

7

11

12

A13L Vcc NC

23

25

I/O6L I/O4L

82

1

2

5

8

10

14

17

20

22

24

02 A4L A7L A8L A11L A14L NC CE0L R/WL GND I/O7L I/O5L

84

3

4

6

9

15

13

16

18

19

21

01 A6L A9L A10L A12L A15L CE1L NC SEML OEL GND NC

A

B

C

INDEX

D

E

F

G

H

J

K

L

3198 drw 04

NOTES:

1. All Vcc pins must be connected to power supply.

2. All GND pins must be connected to ground supply.

3. Package body is approximately 1.12 in x 1.12 in x .16 in.

4. This package code is used to reference the package diagram.

5. This text does not indicate orientation of the actual part marking.

Pin Names

Left Port

Right Port

CE0L, CE1L

CE0R, CE1R

R/WL

R/WR

OEL

OER

A0L - A15L

A0R - A15R

I/O0L - I/O7L

I/O0R - I/O7R

SEML

SEMR

INTL

INTR

BUSYL

BUSYR

M/S

VCC

GND

Names

Chip Enables

Read/Write Enable

Output Enable

Address

Data Input/Output

Semaphore Enable

Interrupt Flag

Busy Flag

Master or Slave Select

Power

Ground

3198 tbl 01

4

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