Integrated
Circuit
Systems, Inc.
ICS85408
LOW SKEW, 1-TO-8
DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
PACKAGE OUTLINE - G SUFFIX FOR 24 LEAD TSSOP
85408BG
TABLE 7. PACKAGE DIMENSIONS
SYMBOL
Millimeters
Minimum
Maximum
N
24
A
--
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
7.70
7.90
E
6.40 BASIC
E1
4.30
4.50
e
0.65 BASIC
L
0.45
0.75
α
0°
8°
aaa
--
0.10
Reference Document: JEDEC Publication 95, MS-153
www.icst.com/products/hiperclocks.html
10
REV. A APRIL 25, 2005