570AILF 데이터 시트보기 (PDF) - Integrated Circuit Systems
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570AILF Datasheet PDF : 9 Pages
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ICS570
Multiplier and Zero Delay Buffer
Clock Period Jitter Tables (ICS570A)
All jitter values are considered typical measured at 25°C with 27Ω termination resistor and 15 pF loads on
both CLK and CLK/2. The feedback is from CLK/2 to FBIN. Note that if an output is unused, it should be left
unconnected to improve output jitter on the active output clocks.
Absolute and One Sigma Jitter (ps)
S1 S0
0M
01
M0
MM
M1
10
1M
11
CLKIN (MHz)
8.333
6.25
3.125
4.167
2.5
25
1.5625
12.5
Multiplier
6x
8x
16x
12x
20x
2x
32x
4x
CLK = 50M
P to P
±115
±115
±120
±120
±120
±120
±120
±120
1 sigma
80
80
80
90
80
70
80
80
Multiplier
3x
4x
8x
6x
10x
1x
16x
2x
CLK/2 = 25M
P to P
±65
±60
±55
±60
±60
±55
±50
±55
1 sigma
20
20
20
20
20
20
20
20
Absolute and One Sigma Jitter (ps)
S1 S0
0M
01
M0
MM
M1
10
1M
11
CLKIN (MHz)
16.667
12.5
6.25
8.333
5
50
3.125
25
Multiplier
6x
8x
16x
12x
20x
2x
32x
4x
CLK = 100M
P to P
±135
±140
±140
±140
±135
±120
±135
±130
1 sigma
100
100
110
110
100
90
100
90
Multiplier
3x
4x
8x
6x
10x
1x
16x
2x
CLK/2 = 50M
P to P
±55
±50
±55
±55
±50
±50
±55
±65
1 sigma
20
20
20
20
20
20
20
20
Absolute and One Sigma Jitter (ps)
S1 S0
0M
01
M0
MM
M1
10
1M
11
CLKIN (MHz)
25
18.375
9.375
12.5
7.5
75
4.6875
37.5
Multiplier
6x
8x
16x
12x
20x
2x
32x
4x
CLK = 150M
P to P
±160
±165
±170
±160
±160
±155
±165
±160
1 sigma
120
120
120
120
120
110
120
110
Multiplier
3x
4x
8x
6x
10x
1x
16x
2x
CLK/2 = 75M
P to P
±55
±55
±50
±55
±55
±55
±55
±50
1 sigma
20
20
20
20
20
20
20
20
MDS 570 I
4
Revision 030905
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
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