570AILF 데이터 시트보기 (PDF) - Integrated Circuit Systems

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570AILF

Multiplier and Zero Delay Buffer

Integrated Circuit Systems 

ICS570

Multiplier and Zero Delay Buffer

External Components

The ICS570 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must be

connected close to the part to minimize lead inductance. No external power supply filtering is required for

this device. A 33Ω series terminating resistor can be used next to each output pin.

Recommended Circuit

S1

VDD

GND

Input

S0

FBIN

CLK

CLK/2

ICLK

CLK

CLK/2

x2 Mode (S1, S0 = 1, 0)

CLK/2 Feedback

ICLK

CLK

CLK/2

x2 Mode (S1, S0 = 1, 1)

CLK Feedback

Using CLK as the feedback will always result in synchronized rising edges between ICLK and CLK.

However, the CLK/2 could be a falling edge compared with ICLK. ICS recommends using CLK/2 feedback

whenever possible. This will synchronize the rising edges of all three clocks.

MDS 570 I

3

Revision 030905

Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com

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