IC62LV25616L
IC62LV25616LL
AC TEST LOADS
READ CYCLE NO.1(1,2) (Address Controlled) (CE = OE = VIL, UB or LB = VIL)
ADDRESS
DOUT
tRC
tAA
tOHA
PREVIOUS DATA VALID
tOHA
DATA VALID
AC WAVEFORMS
READ CYCLE NO. 2(1,3) (CE, OE, AND UB/LB Controlled)
ADDRESS
OE
tRC
tAA
CE
LB, UB
tLZCE
DOUT
tLZB
HIGH-Z
tDOE
tLZOE
tACE
tBA
tOHA
tHZOE
tHZCE
DATA VALID
tHZB
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE, UB, or LB = VIL.
3. Address is valid prior to or coincident with CE LOW transitions.
Integrated Circuit Solution Inc.
7
LPSR013-0D 10/11/2002