HM514170C 데이터 시트보기 (PDF) - Hitachi -> Renesas Electronics

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HM514170C

262,144-word × 16-bit Dynamic Random Access Memory

Hitachi -> Renesas Electronics 

HM514170C, HM51S4170C Series

Block Diagram

Row

Decoder

Row Row

DecodeDrecoder

Row

Decoder

Selector

Selector

Row

Decoder

Row Row

DecodeDrecoder

Row

Decoder

Selector

Selector

I/O4

I/O4

Buffer

I/O5

I/O5

Buffer

I/O6

I/O6

Buffer

I/O7

I/O7

Buffer

I/O3 I/O2

I/O3 I/O2

Buffer Buffer

LWE

UWE

RAS

Address A9

I/O1 I/O0

I/O1 I/O0

Buffer Buffer

I/O15 I/O14

I/O15 I/O14

Buffer Buffer

Peripheral Circuit

A0,A1,A2,A3

Address A4,A5

I/O13

I/O13

Buffer

I/O12

I/O12

Buffer

I/O11

Buffer

I/O11

I/O10

Buffer

I/O10

I/O9

Buffer

I/O9

I/O8

Buffer

I/O8

CAS

OE

A6,A7,A8

Selector

Selector

Row

Decoder

Row Row

DecodeDrecoder

Row

Decoder

Selector

Selector

Row

Decoder

Row Row

DecodeDrecoder

Row

Decoder

Operation Mode

The HM51(S)4170C series has the following 11 operation modes.

4

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