HIP6302 데이터 시트보기 (PDF) - Intersil

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HIP6302

Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller

Intersil 

Block Diagram

HIP6302

PGOOD

VCC

VSEN

COMP

VID0

VID1

VID2

VID3

VID4

FB

X 0.9

X1.15

+

UV

-

OV

LATCH

S

+

OVP

-

POWER-ON

RESET (POR)

CLOCK AND

SAWTOOTH

GENERATOR

THREE

STATE

SOFT-

START

AND FAULT

LOGIC

+∑

-

+

PWM

-

D/A

+

E/A

-

+∑

-

+

PWM

-

CURRENT

CORRECTION

I_TOT

+

OC

-

+

∑

+

I_TRIP

GND

FS/EN

PWM1

PWM2

ISEN1

ISEN2

2

FN4766.3

December 27, 2004

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